a4539b3e56
o Offset and period in synch messages and width negotiation should be done for per target not per lun. Move these from *lun_info to *targ_info. o Change in handling XPT_RESET_DEV and XPT_GET_TRAN_SETTINGS . o Change CAM_* xpt_done return values. o Busy loop did not timeout. Change this to timeout as original NetBSD/pc98. Reviewed by: bsd-nomads ML
1139 lines
27 KiB
C
1139 lines
27 KiB
C
/* $FreeBSD$ */
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/* $NecBSD: tmc18c30.c,v 1.28 1999/07/23 21:00:06 honda Exp $ */
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/* $NetBSD$ */
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#define STG_DEBUG
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#define STG_STATICS
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/*
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1996, 1997, 1998, 1999
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* NetBSD/pc98 porting staff. All rights reserved.
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* Copyright (c) 1996, 1997, 1998, 1999
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* Naofumi HONDA. All rights reserved.
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* Copyright (c) 1996, 1997, 1998, 1999
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* Kouichi Matsuda. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/disklabel.h>
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#if defined(__FreeBSD__) && __FreeBSD_version >= 500001
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#include <sys/bio.h>
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#endif
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#include <sys/buf.h>
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#include <sys/queue.h>
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#include <sys/malloc.h>
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#include <sys/device_port.h>
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#include <sys/errno.h>
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#include <vm/vm.h>
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#ifdef __NetBSD__
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/scsipi/scsi_disk.h>
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#include <machine/dvcfg.h>
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#include <machine/physio_proc.h>
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#include <i386/Cbus/dev/scsi_low.h>
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#include <i386/Cbus/dev/tmc18c30reg.h>
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#include <i386/Cbus/dev/tmc18c30var.h>
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#endif /* __NetBSD__ */
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#define delay(time) DELAY(time)
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#include <machine/cpu.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <machine/dvcfg.h>
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#include <machine/physio_proc.h>
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#include <cam/scsi/scsi_low.h>
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#include <dev/stg/tmc18c30reg.h>
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#include <dev/stg/tmc18c30var.h>
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#if __FreeBSD_version < 400001
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#include "stg.h"
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struct stg_softc *stgdata[NSTG];
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#endif
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#endif /* __FreeBSD__ */
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/***************************************************
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* USER SETTINGS
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***************************************************/
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/* DEVICE CONFIGURATION FLAGS (MINOR)
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*
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* 0x01 DISCONECT OFF
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* 0x02 PARITY LINE OFF
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* 0x04 IDENTIFY MSG OFF ( = single lun)
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* 0x08 SYNC TRANSFER OFF
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*/
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/* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */
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/* For the 512 fifo type: change below */
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#define TMC18C30_FIFOSZ 0x800
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#define TMC18C30_FCB 1
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#define TMC18C50_FIFOSZ 0x2000
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#define TMC18C50_FCB 2
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/***************************************************
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* PARAMS
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***************************************************/
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#define STG_NTARGETS 8
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#define STG_NLUNS 8
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/***************************************************
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* DEBUG
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***************************************************/
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#ifndef DDB
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#define Debugger() panic("should call debugger here (tmc18c30.c)")
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#else /* ! DDB */
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#ifdef __FreeBSD__
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#define Debugger() Debugger("stg")
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#endif /* __FreeBSD__ */
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#endif
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#ifdef STG_DEBUG
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int stg_debug;
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#endif /* STG_DEBUG */
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#ifdef STG_STATICS
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struct stg_statics {
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int disconnect;
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int reselect;
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int sprious_arbit_fail_0;
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int sprious_arbit_fail_1;
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int sprious_arbit_fail_2;
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} stg_statics[STG_NTARGETS];
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#endif /* STG_STATICS */
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/***************************************************
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* ISA DEVICE STRUCTURE
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***************************************************/
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extern struct cfdriver stg_cd;
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/**************************************************************
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* DECLARE
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**************************************************************/
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#ifdef __NetBSD__
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extern int delaycount;
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#endif
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/* static */
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static void stg_pio_read __P((struct stg_softc *, struct targ_info *));
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static void stg_pio_write __P((struct stg_softc *, struct targ_info *));
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static int stg_xfer __P((struct stg_softc *, u_int8_t *, int, int));
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static int stg_msg __P((struct stg_softc *, struct targ_info *, u_int));
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static int stg_reselected __P((struct stg_softc *));
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static __inline int stg_disconnected __P((struct stg_softc *, struct targ_info *));
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static __inline void stg_pdma_end __P((struct stg_softc *, struct targ_info *));
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static int stghw_select_targ_wait __P((struct stg_softc *, int));
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static int stghw_check __P((struct stg_softc *));
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static void stghw_init __P((struct stg_softc *));
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static int stg_negate_signal __P((struct stg_softc *, u_int8_t, u_char *));
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static int stg_expect_signal __P((struct stg_softc *, u_int8_t, u_int8_t));
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static int stg_world_start __P((struct stg_softc *, int));
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static int stghw_start_selection __P((struct stg_softc *sc, struct slccb *));
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static void stghw_bus_reset __P((struct stg_softc *));
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static void stghw_attention __P((struct stg_softc *));
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static int stg_nexus __P((struct stg_softc *, struct targ_info *));
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static int stg_targ_init __P((struct stg_softc *, struct targ_info *));
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static __inline void stghw_bcr_write_1 __P((struct stg_softc *, u_int8_t));
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struct scsi_low_funcs stgfuncs = {
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SC_LOW_INIT_T stg_world_start,
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SC_LOW_BUSRST_T stghw_bus_reset,
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SC_LOW_TARG_INIT_T stg_targ_init,
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SC_LOW_SELECT_T stghw_start_selection,
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SC_LOW_NEXUS_T stg_nexus,
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SC_LOW_ATTEN_T stghw_attention,
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SC_LOW_MSG_T stg_msg,
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SC_LOW_POLL_T stgintr,
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NULL,
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};
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/****************************************************
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* scsi low interface
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****************************************************/
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static __inline void
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stghw_bcr_write_1(sc, bcv)
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struct stg_softc *sc;
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u_int8_t bcv;
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{
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv);
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sc->sc_busimg = bcv;
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}
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static void
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stghw_attention(sc)
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struct stg_softc *sc;
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{
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sc->sc_busc |= BCTL_ATN;
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sc->sc_busimg |= BCTL_ATN;
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg);
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}
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static void
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stghw_bus_reset(sc)
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struct stg_softc *sc;
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{
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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bus_space_write_1(iot, ioh, tmc_ictl, 0);
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bus_space_write_1(iot, ioh, tmc_fctl, 0);
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stghw_bcr_write_1(sc, BCTL_RST);
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delay(100000);
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stghw_bcr_write_1(sc, BCTL_BUSFREE);
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}
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static int
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stghw_start_selection(sc, cb)
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struct stg_softc *sc;
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struct slccb *cb;
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{
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struct scsi_low_softc *slp = &sc->sc_sclow;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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struct targ_info *ti = cb->ti;
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struct lun_info *li = ti->ti_li;
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register u_int8_t stat;
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int s;
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if (li->li_flags & SCSI_LOW_NOPARITY)
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sc->sc_fcRinit &= ~FCTL_PARENB;
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else
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sc->sc_fcRinit |= FCTL_PARENB;
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stghw_bcr_write_1(sc, BCTL_BUSFREE);
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s = splhigh();
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if (slp->sl_disc > 0)
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{
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stat = bus_space_read_1(iot, ioh, tmc_bstat);
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if (stat & (BSTAT_BSY | BSTAT_SEL | BSTAT_IO))
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{
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splx(s);
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return SCSI_LOW_START_FAIL;
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}
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}
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bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit);
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bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
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splx(s);
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SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
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return SCSI_LOW_START_OK;
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}
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static int
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stg_world_start(sc, fdone)
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struct stg_softc *sc;
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int fdone;
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{
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struct scsi_low_softc *slp = &sc->sc_sclow;
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int error;
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#ifdef __FreeBSD__
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intrmask_t s;
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#endif
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if ((error = stghw_check(sc)) != 0)
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return error;
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#ifdef __FreeBSD__
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s = splcam();
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#endif
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stghw_init(sc);
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scsi_low_bus_reset(slp);
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stghw_init(sc);
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#ifdef __FreeBSD__
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splx(s);
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#endif
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SOFT_INTR_REQUIRED(slp);
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return 0;
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}
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static int
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stg_msg(sc, ti, msg)
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struct stg_softc *sc;
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struct targ_info *ti;
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u_int msg;
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{
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struct stg_targ_info *sti = (void *) ti;
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u_int period, offset;
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if (msg != SCSI_LOW_MSG_SYNCH)
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return EINVAL;
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period = ti->ti_maxsynch.period;
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offset = ti->ti_maxsynch.offset;
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period = period << 2;
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if (period >= 200)
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{
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sti->sti_reg_synch = (period - 200) / 50;
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if (period % 50)
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sti->sti_reg_synch ++;
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sti->sti_reg_synch |= SSCTL_SYNCHEN;
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}
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else if (period >= 100)
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{
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sti->sti_reg_synch = (period - 100) / 50;
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if (period % 50)
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sti->sti_reg_synch ++;
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sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
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}
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return 0;
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}
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/****************************************************
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* hwfuncs
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****************************************************/
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static int
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stghw_check(sc)
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struct stg_softc *sc;
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{
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struct scsi_low_softc *slp = &sc->sc_sclow;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int16_t lsb, msb;
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sc->sc_chip = TMCCHIP_UNK;
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sc->sc_fsz = TMC18C50_FIFOSZ;
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sc->sc_fcb = TMC18C50_FCB;
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sc->sc_fcsp = 0;
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sc->sc_fcRinit = FCTL_INTEN;
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sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
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if (slp->sl_cfgflags & CFG_NOATTEN)
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sc->sc_imsg = 0;
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else
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sc->sc_imsg = BCTL_ATN;
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sc->sc_busc = BCTL_BUSEN;
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lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
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msb = bus_space_read_1(iot, ioh, tmc_idmsb);
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switch (msb << 8 | lsb)
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{
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case 0x6127:
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/* TMCCHIP_1800 not supported. (it's my policy) */
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sc->sc_chip = TMCCHIP_1800;
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return EINVAL;
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case 0x60e9:
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sc->sc_chip = TMCCHIP_18C50;
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sc->sc_fcsp |= FCTL_CLRINT;
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if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02)
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{
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sc->sc_chip = TMCCHIP_18C30;
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sc->sc_fsz = TMC18C30_FIFOSZ;
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sc->sc_fcb = TMC18C30_FCB;
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}
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break;
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default:
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return ENODEV;
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}
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|
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sc->sc_icinit = ICTL_ALLINT | sc->sc_fcb;
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return 0;
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}
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|
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static void
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stghw_init(sc)
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struct stg_softc *sc;
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|
{
|
|
bus_space_tag_t iot = sc->sc_iot;
|
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bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
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bus_space_write_1(iot, ioh, tmc_ictl, 0);
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|
stghw_bcr_write_1(sc, BCTL_BUSFREE);
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|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcsp | sc->sc_fcRinit |
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|
FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
|
|
|
|
bus_space_write_1(iot, ioh, tmc_ssctl, 0);
|
|
}
|
|
|
|
static int
|
|
stg_targ_init(sc, ti)
|
|
struct stg_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct stg_targ_info *sti = (void *) ti;
|
|
|
|
ti->ti_maxsynch.period = 0;
|
|
ti->ti_maxsynch.offset = 8;
|
|
sti->sti_reg_synch = 0;
|
|
return 0;
|
|
}
|
|
|
|
/**************************************************************
|
|
* General probe attach
|
|
**************************************************************/
|
|
int
|
|
stgprobesubr(iot, ioh, dvcfg)
|
|
bus_space_tag_t iot;
|
|
bus_space_handle_t ioh;
|
|
u_int dvcfg;
|
|
{
|
|
u_int16_t lsb, msb;
|
|
|
|
lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
|
|
msb = bus_space_read_1(iot, ioh, tmc_idmsb);
|
|
switch (msb << 8 | lsb)
|
|
{
|
|
default:
|
|
return 0;
|
|
case 0x6127:
|
|
/* not support! */
|
|
return 0;
|
|
case 0x60e9:
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
stgprint(aux, name)
|
|
void *aux;
|
|
const char *name;
|
|
{
|
|
|
|
if (name != NULL)
|
|
printf("%s: scsibus ", name);
|
|
return UNCONF;
|
|
}
|
|
|
|
void
|
|
stgattachsubr(sc)
|
|
struct stg_softc *sc;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
|
|
printf("\n");
|
|
|
|
#ifdef __FreeBSD__
|
|
sc->sc_wc = 0x2000 * 2000; /* XXX need calibration */
|
|
#else
|
|
sc->sc_wc = delaycount * 2000; /* 2 sec */
|
|
#endif
|
|
sc->sc_idbit = (1 << slp->sl_hostid);
|
|
slp->sl_funcs = &stgfuncs;
|
|
|
|
slp->sl_cfgflags |= CFG_ASYNC; /* XXX */
|
|
|
|
if (stghw_check(sc) != 0)
|
|
{
|
|
printf("stg: hardware missing\n");
|
|
return;
|
|
}
|
|
|
|
(void) scsi_low_attach(slp, 2, STG_NTARGETS, STG_NLUNS,
|
|
sizeof(struct stg_targ_info));
|
|
}
|
|
|
|
/**************************************************************
|
|
* PDMA functions
|
|
**************************************************************/
|
|
static __inline void
|
|
stg_pdma_end(sc, ti)
|
|
struct stg_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct slccb *cb = ti->ti_nexus;
|
|
u_int len, tres;
|
|
|
|
slp->sl_flags &= ~HW_PDMASTART;
|
|
|
|
if (ti->ti_phase == PH_DATA)
|
|
{
|
|
len = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
|
if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
|
|
{
|
|
if (len != 0)
|
|
{
|
|
tres = len + slp->sl_scp.scp_datalen;
|
|
if (tres <= (u_int) cb->ccb_scp.scp_datalen)
|
|
{
|
|
slp->sl_scp.scp_data -= len;
|
|
slp->sl_scp.scp_datalen = tres;
|
|
}
|
|
else
|
|
{
|
|
slp->sl_error |= PDMAERR;
|
|
printf("%s len %x >= datalen %x\n",
|
|
slp->sl_xname,
|
|
len, slp->sl_scp.scp_datalen);
|
|
}
|
|
}
|
|
}
|
|
else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
|
|
{
|
|
if (len != 0)
|
|
{
|
|
slp->sl_error |= PDMAERR;
|
|
printf("%s: len %x left in fifo\n",
|
|
slp->sl_xname, len);
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
|
|
printf("%s data phase miss\n", slp->sl_xname);
|
|
slp->sl_error |= PDMAERR;
|
|
}
|
|
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
}
|
|
|
|
static void
|
|
stg_pio_read(sc, ti)
|
|
struct stg_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct sc_p *sp = &slp->sl_scp;
|
|
int tout = sc->sc_wc;
|
|
u_int res;
|
|
u_int8_t stat;
|
|
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_FIFOEN);
|
|
|
|
slp->sl_flags |= HW_PDMASTART;
|
|
while (sp->scp_datalen > 0 && tout -- > 0)
|
|
{
|
|
res = bus_space_read_2(iot, ioh, tmc_fdcnt);
|
|
if (res == 0)
|
|
{
|
|
stat = bus_space_read_1(iot, ioh, tmc_bstat);
|
|
if ((stat & BSTAT_PHMASK) == BSTAT_IO)
|
|
continue;
|
|
break; /* phase mismatch */
|
|
}
|
|
|
|
/* XXX */
|
|
if (res > sp->scp_datalen)
|
|
{
|
|
slp->sl_error |= PDMAERR;
|
|
break;
|
|
}
|
|
|
|
sp->scp_datalen -= res;
|
|
if (res & 1)
|
|
{
|
|
*sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo);
|
|
sp->scp_data ++;
|
|
res --;
|
|
}
|
|
|
|
bus_space_read_multi_2(iot, ioh, tmc_rfifo,
|
|
(u_int16_t *) sp->scp_data, res >> 1);
|
|
sp->scp_data += res;
|
|
}
|
|
|
|
if (tout <= 0)
|
|
printf("%s pio read timeout\n", slp->sl_xname);
|
|
}
|
|
|
|
#define WFIFO_CRIT 0x100
|
|
|
|
static void
|
|
stg_pio_write(sc, ti)
|
|
struct stg_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct sc_p *sp = &slp->sl_scp;
|
|
u_int res;
|
|
int tout = sc->sc_wc;
|
|
register u_int8_t stat;
|
|
|
|
stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
|
|
bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, stat);
|
|
|
|
slp->sl_flags |= HW_PDMASTART;
|
|
while (sp->scp_datalen > 0 && tout -- > 0)
|
|
{
|
|
stat = bus_space_read_1(iot, ioh, tmc_bstat);
|
|
if ((stat & BSTAT_PHMASK) != 0)
|
|
break;
|
|
|
|
if (bus_space_read_2(iot, ioh, tmc_fdcnt) >= WFIFO_CRIT)
|
|
continue;
|
|
|
|
res = (sp->scp_datalen > WFIFO_CRIT) ?
|
|
WFIFO_CRIT : sp->scp_datalen;
|
|
sp->scp_datalen -= res;
|
|
if ((res & 0x1) != 0)
|
|
{
|
|
bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data);
|
|
sp->scp_data ++;
|
|
res --;
|
|
}
|
|
|
|
bus_space_write_multi_2(iot, ioh, tmc_wfifo,
|
|
(u_int16_t *) sp->scp_data, res >> 1);
|
|
sp->scp_data += res;
|
|
}
|
|
|
|
if (tout <= 0)
|
|
printf("%s pio write timeout\n", slp->sl_xname);
|
|
}
|
|
|
|
static int
|
|
stg_negate_signal(sc, mask, s)
|
|
struct stg_softc *sc;
|
|
u_int8_t mask;
|
|
u_char *s;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
int wc = (sc->sc_wc >> 2);
|
|
u_int8_t regv;
|
|
|
|
do
|
|
{
|
|
regv = bus_space_read_1(bst, bsh, tmc_bstat);
|
|
if (regv == 0xff)
|
|
return EIO;
|
|
}
|
|
while ((regv & mask) != 0 && (-- wc) > 0);
|
|
|
|
if (wc <= 0)
|
|
{
|
|
printf("%s: %s singal off timeout \n", slp->sl_xname, s);
|
|
return EIO;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
stg_expect_signal(sc, phase, mask)
|
|
struct stg_softc *sc;
|
|
u_int8_t phase, mask;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
int wc = (sc->sc_wc >> 2);
|
|
int rv = -1;
|
|
u_int8_t ph;
|
|
|
|
phase &= BSTAT_PHMASK;
|
|
do
|
|
{
|
|
ph = bus_space_read_1(bst, bsh, tmc_bstat);
|
|
if (ph == 0xff) {
|
|
rv = -1;
|
|
break;
|
|
}
|
|
if ((ph & BSTAT_PHMASK) != phase) {
|
|
rv = 0;
|
|
break;
|
|
}
|
|
if ((ph & mask) != 0) {
|
|
rv = 1;
|
|
break;
|
|
}
|
|
}
|
|
while (wc -- > 0);
|
|
|
|
if (wc <= 0) {
|
|
printf("%s: stg_expect_signal timeout\n", slp->sl_xname);
|
|
rv = -1;
|
|
}
|
|
return rv;
|
|
}
|
|
|
|
static int
|
|
stg_xfer(sc, buf, len, phase)
|
|
struct stg_softc *sc;
|
|
u_int8_t *buf;
|
|
int len;
|
|
int phase;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
int rv, ptr, atn;
|
|
|
|
atn = (scsi_low_is_msgout_continue(slp->sl_nexus) != 0);
|
|
if (phase & BSTAT_IO)
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
else
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
|
|
|
|
for (ptr = 0; len > 0; len --)
|
|
{
|
|
rv = stg_expect_signal(sc, phase, BSTAT_REQ);
|
|
if (rv <= 0)
|
|
goto bad;
|
|
|
|
if (len == 1 && atn == 0)
|
|
{
|
|
sc->sc_busc &= ~BCTL_ATN;
|
|
stghw_bcr_write_1(sc, sc->sc_busc);
|
|
}
|
|
|
|
if (phase & BSTAT_IO)
|
|
{
|
|
buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata);
|
|
}
|
|
else
|
|
{
|
|
bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]);
|
|
}
|
|
stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
|
|
}
|
|
|
|
bad:
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
return len;
|
|
}
|
|
|
|
/**************************************************************
|
|
* disconnect & reselect (HW low)
|
|
**************************************************************/
|
|
static int
|
|
stg_reselected(sc)
|
|
struct stg_softc *sc;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct targ_info *ti;
|
|
u_int sid;
|
|
|
|
if (slp->sl_selid != NULL)
|
|
{
|
|
/* XXX:
|
|
* Selection vs Reselection conflicts.
|
|
*/
|
|
#ifdef STG_STATICS
|
|
stg_statics[slp->sl_selid->ti_id].sprious_arbit_fail_0 ++;
|
|
#endif /* STG_STATICS */
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
|
}
|
|
|
|
/* XXX:
|
|
* We should ack the reselection as soon as possible,
|
|
* becuase the target would abort the current reselection seq
|
|
* due to reselection timeout.
|
|
*/
|
|
sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcsp |
|
|
sc->sc_fcRinit | FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
|
|
|
|
sid &= ~sc->sc_idbit;
|
|
sid = ffs(sid) - 1;
|
|
if ((ti = scsi_low_reselected(slp, sid)) == NULL)
|
|
return EJUSTRETURN;
|
|
|
|
#ifdef STG_STATICS
|
|
stg_statics[sid].reselect ++;
|
|
#endif /* STG_STATICS */
|
|
return EJUSTRETURN;
|
|
}
|
|
|
|
static __inline int
|
|
stg_disconnected(sc, ti)
|
|
struct stg_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
/* clear bus status & fifo */
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
|
sc->sc_fcRinit &= ~FCTL_PARENB;
|
|
sc->sc_busc &= ~BCTL_ATN;
|
|
|
|
#ifdef STG_STATICS
|
|
if (slp->sl_msgphase == MSGPH_DISC)
|
|
stg_statics[ti->ti_id].disconnect ++;
|
|
#endif /* STG_STATICS */
|
|
scsi_low_disconnected(slp, ti);
|
|
return 1;
|
|
}
|
|
|
|
/**************************************************************
|
|
* SEQUENCER
|
|
**************************************************************/
|
|
static int
|
|
stg_nexus(sc, ti)
|
|
struct stg_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct lun_info *li = ti->ti_li;
|
|
struct stg_targ_info *sti = (void *) ti;
|
|
|
|
if (li->li_flags & SCSI_LOW_NOPARITY)
|
|
sc->sc_fcRinit &= ~FCTL_PARENB;
|
|
else
|
|
sc->sc_fcRinit |= FCTL_PARENB;
|
|
|
|
bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
stghw_select_targ_wait(sc, id)
|
|
struct stg_softc *sc;
|
|
int id;
|
|
{
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
int wc, error = EIO;
|
|
|
|
bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit | (1 << id));
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit & (~FCTL_INTEN));
|
|
stghw_bcr_write_1(sc, sc->sc_busc | sc->sc_imsg | BCTL_SEL);
|
|
|
|
for (wc = 50000; wc; wc--)
|
|
{
|
|
if (bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY)
|
|
{
|
|
error = 0;
|
|
break;
|
|
}
|
|
|
|
delay(1);
|
|
}
|
|
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
return error;
|
|
}
|
|
|
|
int
|
|
stgintr(arg)
|
|
void *arg;
|
|
{
|
|
struct stg_softc *sc = arg;
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct targ_info *ti;
|
|
struct physio_proc *pp;
|
|
struct buf *bp;
|
|
int len;
|
|
u_int8_t status, astatus, regv;
|
|
|
|
/*******************************************
|
|
* interrupt check
|
|
*******************************************/
|
|
if (slp->sl_flags & HW_INACTIVE)
|
|
return 0;
|
|
|
|
astatus = bus_space_read_1(iot, ioh, tmc_astat);
|
|
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
|
|
|
if ((astatus & ASTAT_STATMASK) == 0)
|
|
return 0;
|
|
|
|
if (astatus & ASTAT_SCSIRST)
|
|
{
|
|
bus_space_write_1(iot, ioh, tmc_fctl,
|
|
sc->sc_fcRinit | FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
|
|
scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
|
|
"bus reset (power off?)");
|
|
return 1;
|
|
}
|
|
|
|
/*******************************************
|
|
* debug section
|
|
*******************************************/
|
|
#ifdef STG_DEBUG
|
|
if (stg_debug)
|
|
{
|
|
scsi_low_print(slp, NULL);
|
|
printf("%s st %x ist %x\n\n", slp->sl_xname,
|
|
status, astatus);
|
|
if (stg_debug > 1)
|
|
Debugger();
|
|
}
|
|
#endif /* STG_DEBUG */
|
|
|
|
/*******************************************
|
|
* reselection & nexus
|
|
*******************************************/
|
|
if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
|
|
{
|
|
if (stg_reselected(sc) == EJUSTRETURN)
|
|
return 1;
|
|
}
|
|
|
|
if ((ti = slp->sl_nexus) == NULL)
|
|
{
|
|
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
|
if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
|
|
return 1;
|
|
|
|
/* XXX:
|
|
* Some scsi devices overrun scsi phase.
|
|
*/
|
|
if (stg_reselected(sc) == EJUSTRETURN)
|
|
{
|
|
#ifdef STG_STATICS
|
|
if ((ti = slp->sl_nexus) != NULL)
|
|
stg_statics[ti->ti_id].sprious_arbit_fail_1 ++;
|
|
#endif /* STG_STATICS */
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
|
|
(sc->sc_fcRinit & FCTL_PARENB) != 0)
|
|
{
|
|
slp->sl_error |= PARITYERR;
|
|
if (ti->ti_phase == PH_MSGIN)
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 1);
|
|
else
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
|
|
}
|
|
|
|
/*******************************************
|
|
* aribitration & selection
|
|
*******************************************/
|
|
switch (ti->ti_phase)
|
|
{
|
|
case PH_ARBSTART:
|
|
if ((astatus & ASTAT_ARBIT) == 0)
|
|
goto arb_fail;
|
|
|
|
status = bus_space_read_1(iot, ioh, tmc_bstat);
|
|
if ((status & BSTAT_IO) != 0)
|
|
{
|
|
/* XXX:
|
|
* Selection vs Reselection conflicts.
|
|
*/
|
|
#ifdef STG_STATICS
|
|
stg_statics[ti->ti_id].sprious_arbit_fail_2 ++;
|
|
#endif /* STG_STATICS */
|
|
arb_fail:
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
stghw_bcr_write_1(sc, BCTL_BUSFREE);
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_NULL);
|
|
scsi_low_clear_nexus(slp, ti);
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
* selection assert start.
|
|
*/
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
|
|
scsi_low_arbit_win(slp, ti);
|
|
#ifdef STG_ALT_SELECTION
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|
bus_space_write_1(iot, ioh, tmc_scsiid,
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|
sc->sc_idbit | (1 << ti->ti_id));
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|
/* assert busy */
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|
stghw_bcr_write_1(sc, sc->sc_imsg | BCTL_BSY | sc->sc_busc);
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|
/* arb flag clear */
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|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
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|
/* assert sel */
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|
stghw_bcr_write_1(sc, sc->sc_imsg | BCTL_BSY | sc->sc_busc | BCTL_SEL);
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|
delay(3);
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|
/* deassert busy */
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|
stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
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|
#else /* !STG_ALT_SELECTION */
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|
bus_space_write_1(iot, ioh, tmc_scsiid,
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|
sc->sc_idbit | (1 << ti->ti_id));
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|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
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|
stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
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|
#endif /* !STG_ALT_SELECTION */
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|
return 1;
|
|
|
|
case PH_SELSTART:
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|
if ((status & BSTAT_BSY) == 0)
|
|
{
|
|
if (stghw_select_targ_wait(sc, ti->ti_id) != 0)
|
|
{
|
|
return stg_disconnected(sc, ti);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* attention assert.
|
|
*/
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit |
|
|
FCTL_CLRFIFO);
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
|
|
SCSI_LOW_TARGET_ASSERT_ATN(ti);
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_IDENTIFY, 0);
|
|
return 1;
|
|
|
|
case PH_RESEL:
|
|
/* clear a busy line */
|
|
bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
|
|
stghw_bcr_write_1(sc, sc->sc_busc);
|
|
if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
|
|
{
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
|
|
return 1;
|
|
}
|
|
break;
|
|
}
|
|
|
|
/*******************************************
|
|
* scsi seq
|
|
*******************************************/
|
|
if (slp->sl_flags & HW_PDMASTART)
|
|
stg_pdma_end(sc, ti);
|
|
|
|
switch (status & PHASE_MASK)
|
|
{
|
|
case COMMAND_PHASE:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
|
|
if (scsi_low_cmd(slp, ti) != 0)
|
|
break;
|
|
|
|
if (stg_xfer(sc, slp->sl_scp.scp_cmd,
|
|
slp->sl_scp.scp_cmdlen, COMMAND_PHASE) != 0)
|
|
{
|
|
printf("%s: MSGOUT short\n", slp->sl_xname);
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_RESET, 0);
|
|
}
|
|
break;
|
|
|
|
case DATA_OUT_PHASE:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
|
|
if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
|
|
break;
|
|
|
|
pp = physio_proc_enter(bp);
|
|
stg_pio_write(sc, ti);
|
|
physio_proc_leave(pp);
|
|
break;
|
|
|
|
case DATA_IN_PHASE:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
|
|
if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
|
|
break;
|
|
|
|
pp = physio_proc_enter(bp);
|
|
stg_pio_read(sc, ti);
|
|
physio_proc_leave(pp);
|
|
break;
|
|
|
|
case STATUS_PHASE:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
|
|
ti->ti_status = bus_space_read_1(iot, ioh, tmc_rdata);
|
|
break;
|
|
|
|
case MESSAGE_OUT_PHASE:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
|
|
len = scsi_low_msgout(slp, ti);
|
|
if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE))
|
|
{
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_RESET, 0);
|
|
printf("%s: MSGOUT short\n", slp->sl_xname);
|
|
}
|
|
break;
|
|
|
|
case MESSAGE_IN_PHASE:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
|
|
|
|
/* confirm REQ signal */
|
|
regv = stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ);
|
|
if (regv <= 0)
|
|
{
|
|
printf("%s: MSGIN: no req\n", slp->sl_xname);
|
|
break;
|
|
}
|
|
/* read data with NOACK */
|
|
regv = bus_space_read_1(sc->sc_iot, sc->sc_ioh, tmc_sdna);
|
|
|
|
scsi_low_msgin(slp, ti, regv);
|
|
|
|
/* read data with ACK */
|
|
if (regv != bus_space_read_1(sc->sc_iot, sc->sc_ioh, tmc_rdata))
|
|
{
|
|
printf("%s: MSGIN: data mismatch\n", slp->sl_xname);
|
|
}
|
|
|
|
if (slp->sl_msgphase != 0)
|
|
{
|
|
stg_negate_signal(sc, BSTAT_ACK, "discon<ACK>");
|
|
return stg_disconnected(sc, ti);
|
|
}
|
|
break;
|
|
|
|
case BUSFREE_PHASE:
|
|
printf("%s unexpected disconnection\n", slp->sl_xname);
|
|
return stg_disconnected(sc, ti);
|
|
|
|
default:
|
|
printf("%s unknown phase bus %x intr %x\n",
|
|
slp->sl_xname, status, astatus);
|
|
break;
|
|
}
|
|
|
|
return 1;
|
|
}
|