cfc8861b06
- Put all clock and control unit driver in BUS_PASS_RESOURCE except for the DE2 CCU as it needs the main CCU to be available. - Use BUS_PASS_CPU for a20_cpu_cfg as it makes more sense. - For aw_syscon use SCHEDULER pass as we need it early for drivers that attach in BUS_PASS_SUPPORTDEV - For the rest we can use BUS_PASS_SUPPORTDEV
368 lines
9.8 KiB
C
368 lines
9.8 KiB
C
/*-
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* Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.Org>
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* Copyright (c) 2016 Vladimir Belian <fate10@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/time.h>
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#include <sys/rman.h>
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#include <sys/clock.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/extres/clk/clk_fixed.h>
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#include <arm/allwinner/aw_machdep.h>
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#include "clock_if.h"
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#define LOSC_CTRL_REG 0x00
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#define A10_RTC_DATE_REG 0x04
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#define A10_RTC_TIME_REG 0x08
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#define A31_LOSC_AUTO_SWT_STA 0x04
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#define A31_RTC_DATE_REG 0x10
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#define A31_RTC_TIME_REG 0x14
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#define TIME_MASK 0x001f3f3f
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#define LOSC_OSC_SRC (1 << 0)
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#define LOSC_GSM (1 << 3)
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#define LOSC_AUTO_SW_EN (1 << 14)
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#define LOSC_MAGIC 0x16aa0000
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#define LOSC_BUSY_MASK 0x00000380
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#define IS_SUN7I (sc->conf->is_a20 == true)
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#define YEAR_MIN (IS_SUN7I ? 1970 : 2010)
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#define YEAR_MAX (IS_SUN7I ? 2100 : 2073)
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#define YEAR_OFFSET (IS_SUN7I ? 1900 : 2010)
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#define YEAR_MASK (IS_SUN7I ? 0xff : 0x3f)
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#define LEAP_BIT (IS_SUN7I ? 24 : 22)
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#define GET_SEC_VALUE(x) ((x) & 0x0000003f)
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#define GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8)
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#define GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16)
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#define GET_DAY_VALUE(x) ((x) & 0x0000001f)
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#define GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8)
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#define GET_YEAR_VALUE(x) (((x) >> 16) & YEAR_MASK)
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#define SET_DAY_VALUE(x) GET_DAY_VALUE(x)
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#define SET_MON_VALUE(x) (((x) & 0x0000000f) << 8)
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#define SET_YEAR_VALUE(x) (((x) & YEAR_MASK) << 16)
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#define SET_LEAP_VALUE(x) (((x) & 0x00000001) << LEAP_BIT)
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#define SET_SEC_VALUE(x) GET_SEC_VALUE(x)
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#define SET_MIN_VALUE(x) (((x) & 0x0000003f) << 8)
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#define SET_HOUR_VALUE(x) (((x) & 0x0000001f) << 16)
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#define HALF_OF_SEC_NS 500000000
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#define RTC_RES_US 1000000
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#define RTC_TIMEOUT 70
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#define RTC_READ(sc, reg) bus_read_4((sc)->res, (reg))
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#define RTC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
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#define IS_LEAP_YEAR(y) (((y) % 400) == 0 || (((y) % 100) != 0 && ((y) % 4) == 0))
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struct aw_rtc_conf {
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uint64_t iosc_freq;
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bus_size_t rtc_date;
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bus_size_t rtc_time;
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bus_size_t rtc_losc_sta;
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bool is_a20;
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};
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struct aw_rtc_conf a10_conf = {
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.rtc_date = A10_RTC_DATE_REG,
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.rtc_time = A10_RTC_TIME_REG,
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.rtc_losc_sta = LOSC_CTRL_REG,
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};
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struct aw_rtc_conf a20_conf = {
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.rtc_date = A10_RTC_DATE_REG,
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.rtc_time = A10_RTC_TIME_REG,
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.rtc_losc_sta = LOSC_CTRL_REG,
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.is_a20 = true,
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};
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struct aw_rtc_conf a31_conf = {
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.iosc_freq = 650000, /* between 600 and 700 Khz */
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.rtc_date = A31_RTC_DATE_REG,
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.rtc_time = A31_RTC_TIME_REG,
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.rtc_losc_sta = A31_LOSC_AUTO_SWT_STA,
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};
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struct aw_rtc_conf h3_conf = {
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.iosc_freq = 16000000,
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.rtc_date = A31_RTC_DATE_REG,
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.rtc_time = A31_RTC_TIME_REG,
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.rtc_losc_sta = A31_LOSC_AUTO_SWT_STA,
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};
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun4i-a10-rtc", (uintptr_t) &a10_conf },
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{ "allwinner,sun7i-a20-rtc", (uintptr_t) &a20_conf },
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{ "allwinner,sun6i-a31-rtc", (uintptr_t) &a31_conf },
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{ "allwinner,sun8i-h3-rtc", (uintptr_t) &h3_conf },
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{ "allwinner,sun50i-h5-rtc", (uintptr_t) &h3_conf },
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{ NULL, 0 }
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};
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struct aw_rtc_softc {
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struct resource *res;
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struct aw_rtc_conf *conf;
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int type;
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};
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static struct clk_fixed_def aw_rtc_osc32k = {
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.clkdef.id = 0,
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.freq = 32768,
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};
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static struct clk_fixed_def aw_rtc_iosc = {
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.clkdef.id = 2,
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};
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static void aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev);
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static int aw_rtc_probe(device_t dev);
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static int aw_rtc_attach(device_t dev);
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static int aw_rtc_detach(device_t dev);
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static int aw_rtc_gettime(device_t dev, struct timespec *ts);
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static int aw_rtc_settime(device_t dev, struct timespec *ts);
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static device_method_t aw_rtc_methods[] = {
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DEVMETHOD(device_probe, aw_rtc_probe),
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DEVMETHOD(device_attach, aw_rtc_attach),
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DEVMETHOD(device_detach, aw_rtc_detach),
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DEVMETHOD(clock_gettime, aw_rtc_gettime),
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DEVMETHOD(clock_settime, aw_rtc_settime),
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DEVMETHOD_END
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};
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static driver_t aw_rtc_driver = {
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"rtc",
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aw_rtc_methods,
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sizeof(struct aw_rtc_softc),
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};
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static devclass_t aw_rtc_devclass;
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EARLY_DRIVER_MODULE(aw_rtc, simplebus, aw_rtc_driver, aw_rtc_devclass, 0, 0,
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BUS_PASS_RESOURCE + BUS_PASS_ORDER_FIRST);
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MODULE_VERSION(aw_rtc, 1);
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SIMPLEBUS_PNP_INFO(compat_data);
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static int
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aw_rtc_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev, "Allwinner RTC");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aw_rtc_attach(device_t dev)
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{
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struct aw_rtc_softc *sc = device_get_softc(dev);
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uint32_t val;
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int rid = 0;
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sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (!sc->res) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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sc->conf = (struct aw_rtc_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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val = RTC_READ(sc, LOSC_CTRL_REG);
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val |= LOSC_AUTO_SW_EN;
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val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC;
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RTC_WRITE(sc, LOSC_CTRL_REG, val);
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DELAY(100);
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if (bootverbose) {
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val = RTC_READ(sc, sc->conf->rtc_losc_sta);
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if ((val & LOSC_OSC_SRC) == 0)
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device_printf(dev, "Using internal oscillator\n");
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else
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device_printf(dev, "Using external oscillator\n");
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}
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aw_rtc_install_clocks(sc, dev);
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clock_register(dev, RTC_RES_US);
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return (0);
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}
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static int
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aw_rtc_detach(device_t dev)
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{
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/* can't support detach, since there's no clock_unregister function */
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return (EBUSY);
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}
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static void
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aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev) {
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struct clkdom *clkdom;
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const char **clknames;
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phandle_t node;
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int nclocks;
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node = ofw_bus_get_node(dev);
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nclocks = ofw_bus_string_list_to_array(node, "clock-output-names", &clknames);
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/* No clocks to export */
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if (nclocks <= 0)
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return;
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if (nclocks != 3) {
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device_printf(dev, "Having only %d clocks instead of 3, aborting\n", nclocks);
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return;
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}
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clkdom = clkdom_create(dev);
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aw_rtc_osc32k.clkdef.name = clknames[0];
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if (clknode_fixed_register(clkdom, &aw_rtc_osc32k) != 0)
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device_printf(dev, "Cannot register osc32k clock\n");
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aw_rtc_iosc.clkdef.name = clknames[2];
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aw_rtc_iosc.freq = sc->conf->iosc_freq;
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if (clknode_fixed_register(clkdom, &aw_rtc_iosc) != 0)
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device_printf(dev, "Cannot register iosc clock\n");
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clkdom_finit(clkdom);
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if (bootverbose)
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clkdom_dump(clkdom);
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}
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static int
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aw_rtc_gettime(device_t dev, struct timespec *ts)
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{
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struct aw_rtc_softc *sc = device_get_softc(dev);
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struct clocktime ct;
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uint32_t rdate, rtime;
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rdate = RTC_READ(sc, sc->conf->rtc_date);
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rtime = RTC_READ(sc, sc->conf->rtc_time);
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if ((rtime & TIME_MASK) == 0)
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rdate = RTC_READ(sc, sc->conf->rtc_date);
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ct.sec = GET_SEC_VALUE(rtime);
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ct.min = GET_MIN_VALUE(rtime);
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ct.hour = GET_HOUR_VALUE(rtime);
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ct.day = GET_DAY_VALUE(rdate);
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ct.mon = GET_MON_VALUE(rdate);
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ct.year = GET_YEAR_VALUE(rdate) + YEAR_OFFSET;
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ct.dow = -1;
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/* RTC resolution is 1 sec */
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ct.nsec = 0;
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return (clock_ct_to_ts(&ct, ts));
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}
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static int
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aw_rtc_settime(device_t dev, struct timespec *ts)
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{
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struct aw_rtc_softc *sc = device_get_softc(dev);
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struct clocktime ct;
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uint32_t clk, rdate, rtime;
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/* RTC resolution is 1 sec */
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if (ts->tv_nsec >= HALF_OF_SEC_NS)
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ts->tv_sec++;
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ts->tv_nsec = 0;
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clock_ts_to_ct(ts, &ct);
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if ((ct.year < YEAR_MIN) || (ct.year > YEAR_MAX)) {
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device_printf(dev, "could not set time, year out of range\n");
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return (EINVAL);
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}
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for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
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if (clk > RTC_TIMEOUT) {
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device_printf(dev, "could not set time, RTC busy\n");
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return (EINVAL);
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}
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DELAY(1);
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}
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/* reset time register to avoid unexpected date increment */
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RTC_WRITE(sc, sc->conf->rtc_time, 0);
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rdate = SET_DAY_VALUE(ct.day) | SET_MON_VALUE(ct.mon) |
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SET_YEAR_VALUE(ct.year - YEAR_OFFSET) |
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SET_LEAP_VALUE(IS_LEAP_YEAR(ct.year));
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rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) |
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SET_HOUR_VALUE(ct.hour);
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for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
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if (clk > RTC_TIMEOUT) {
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device_printf(dev, "could not set date, RTC busy\n");
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return (EINVAL);
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}
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DELAY(1);
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}
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RTC_WRITE(sc, sc->conf->rtc_date, rdate);
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for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
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if (clk > RTC_TIMEOUT) {
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device_printf(dev, "could not set time, RTC busy\n");
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return (EINVAL);
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}
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DELAY(1);
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}
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RTC_WRITE(sc, sc->conf->rtc_time, rtime);
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DELAY(RTC_TIMEOUT);
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return (0);
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}
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