4f4d35edf0
performance issues. 1) The pmap module has had too many inlines, and so the object file is simply bigger than it needs to be. Some common code is also merged into subroutines. 2) Removal of some *evil* PHYS_TO_VM_PAGE macro calls. Unfortunately, a few have needed to be added also. The removal caused the need for more vm_page_lookups. I added lookup hints to minimize the need for the page table lookup operations. 3) Removal of some bogus performance improvements, that mostly made the code more complex (tracking individual page table page updates unnecessarily). Those improvements actually hurt 386 processors perf (not that people who worry about perf use 386 processors anymore :-)). 4) Changed pv queue manipulations/structures to be TAILQ's. 5) The pv queue code has had some performance problems since day one. Some significant scalability issues are resolved by threading the pv entries from the pmap AND the physical address instead of just the physical address. This makes certain pmap operations run much faster. This does not affect most micro-benchmarks, but should help loaded system performance *significantly*. DG helped and came up with most of the solution for this one. 6) Most if not all pmap bit operations follow the pattern: pmap_test_bit(); pmap_clear_bit(); That made for twice the necessary pv list traversal. The pmap interface now supports only pmap_tc_bit type operations: pmap_[test/clear]_modified, pmap_[test/clear]_referenced. Additionally, the modified routine now takes a vm_page_t arg instead of a phys address. This eliminates a PHYS_TO_VM_PAGE operation. 7) Several rewrites of routines that contain redundant code to use common routines, so that there is a greater likelihood of keeping the cache footprint smaller.
238 lines
7.7 KiB
C
238 lines
7.7 KiB
C
/*
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* Copyright (c) 1991 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and William Jolitz of UUNET Technologies Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Derived from hp300 version by Mike Hibler, this version by William
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* Jolitz uses a recursive map [a pde points to the page directory] to
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* map the page tables using the pagetables themselves. This is done to
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* reduce the impact on kernel virtual memory for lots of sparse address
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* space, and to reduce the cost of memory to each process.
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*
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* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
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* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
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* $Id: pmap.h,v 1.40 1996/06/08 11:21:19 bde Exp $
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*/
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#ifndef _MACHINE_PMAP_H_
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#define _MACHINE_PMAP_H_
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/*
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* Page-directory and page-table entires follow this format, with a few
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* of the fields not present here and there, depending on a lot of things.
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*/
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/* ---- Intel Nomenclature ---- */
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#define PG_V 0x001 /* P Valid */
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#define PG_RW 0x002 /* R/W Read/Write */
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#define PG_U 0x004 /* U/S User/Supervisor */
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#define PG_NC_PWT 0x008 /* PWT Write through */
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#define PG_NC_PCD 0x010 /* PCD Cache disable */
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#define PG_A 0x020 /* A Accessed */
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#define PG_M 0x040 /* D Dirty */
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#define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */
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#define PG_G 0x100 /* G Global */
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#define PG_AVAIL1 0x200 /* / Available for system */
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#define PG_AVAIL2 0x400 /* < programmers use */
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#define PG_AVAIL3 0x800 /* \ */
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/* Our various interpretations of the above */
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#define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
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#define PG_MANAGED PG_AVAIL2
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#define PG_FRAME (~PAGE_MASK)
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#define PG_PROT (PG_RW|PG_U) /* all protection bits . */
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#define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */
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/*
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* Page Protection Exception bits
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*/
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#define PGEX_P 0x01 /* Protection violation vs. not present */
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#define PGEX_W 0x02 /* during a Write cycle */
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#define PGEX_U 0x04 /* access from User mode (UPL) */
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/*
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* Pte related macros
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*/
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#define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT)))
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#ifndef NKPT
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#define NKPT 9 /* actual number of kernel page tables */
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#endif
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#ifndef NKPDE
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#define NKPDE 63 /* addressable number of page tables/pde's */
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#endif
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/*
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* The *PTDI values control the layout of virtual memory
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*
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* XXX This works for now, but I am not real happy with it, I'll fix it
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* right after I fix locore.s and the magic 28K hole
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*/
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#define APTDPTDI (NPDEPG-1) /* alt ptd entry that points to APTD */
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#define KPTDI (APTDPTDI-NKPDE)/* start of kernel virtual pde's */
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#define PTDPTDI (KPTDI-1) /* ptd entry that points to ptd! */
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#define KSTKPTDI (PTDPTDI-1) /* ptd entry for u./kernel&user stack */
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#define KSTKPTEOFF (NPTEPG-UPAGES) /* pte entry for kernel stack */
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/*
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* XXX doesn't really belong here I guess...
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*/
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#define ISA_HOLE_START 0xa0000
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#define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
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#ifndef LOCORE
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#include <sys/queue.h>
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typedef unsigned int *pd_entry_t;
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typedef unsigned int *pt_entry_t;
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#define PDESIZE sizeof(pd_entry_t) /* for assembly files */
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#define PTESIZE sizeof(pt_entry_t) /* for assembly files */
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/*
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* Address of current and alternate address space page table maps
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* and directories.
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*/
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#ifdef KERNEL
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extern pt_entry_t PTmap[], APTmap[], Upte;
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extern pd_entry_t PTD[], APTD[], PTDpde, APTDpde, Upde;
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extern int IdlePTD; /* physical address of "Idle" state directory */
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#endif
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/*
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* virtual address to page table entry and
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* to physical address. Likewise for alternate address space.
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* Note: these work recursively, thus vtopte of a pte will give
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* the corresponding pde that in turn maps it.
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*/
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#define vtopte(va) (PTmap + i386_btop(va))
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#define vtophys(va) (((int) (*vtopte(va))&PG_FRAME) | ((int)(va) & PAGE_MASK))
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#define avtopte(va) (APTmap + i386_btop(va))
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#define avtophys(va) (((int) (*avtopte(va))&PG_FRAME) | ((int)(va) & PAGE_MASK))
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#ifdef KERNEL
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/*
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* Routine: pmap_kextract
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* Function:
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* Extract the physical page address associated
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* kernel virtual address.
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*/
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static __inline vm_offset_t
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pmap_kextract(vm_offset_t va)
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{
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vm_offset_t pa = *(int *)vtopte(va);
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pa = (pa & PG_FRAME) | (va & PAGE_MASK);
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return pa;
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}
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#endif
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struct vm_page;
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/*
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* Pmap stuff
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*/
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struct pv_entry;
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typedef struct {
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int pv_list_count;
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TAILQ_HEAD(,pv_entry) pv_list;
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} pv_table_t;
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struct pmap {
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pd_entry_t *pm_pdir; /* KVA of page directory */
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vm_object_t pm_pteobj; /* Container for pte's */
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pv_table_t pm_pvlist; /* list of mappings in pmap */
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int pm_count; /* reference count */
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struct pmap_statistics pm_stats; /* pmap statistics */
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struct vm_page *pm_ptphint; /* pmap ptp hint */
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};
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typedef struct pmap *pmap_t;
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#ifdef KERNEL
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extern pmap_t kernel_pmap;
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#endif
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/*
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* For each vm_page_t, there is a list of all currently valid virtual
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* mappings of that page. An entry is a pv_entry_t, the list is pv_table.
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*/
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typedef struct pv_entry {
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pmap_t pv_pmap; /* pmap where mapping lies */
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vm_offset_t pv_va; /* virtual address for mapping */
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TAILQ_ENTRY(pv_entry) pv_list;
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TAILQ_ENTRY(pv_entry) pv_plist;
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vm_page_t pv_ptem; /* VM page for pte */
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} *pv_entry_t;
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#define PV_ENTRY_NULL ((pv_entry_t) 0)
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#define PV_CI 0x01 /* all entries must be cache inhibited */
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#define PV_PTPAGE 0x02 /* entry maps a page table page */
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#ifdef KERNEL
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extern caddr_t CADDR1;
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extern pt_entry_t *CMAP1;
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extern vm_offset_t avail_end;
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extern vm_offset_t avail_start;
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extern vm_offset_t phys_avail[];
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pv_table_t *pv_table;
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extern vm_offset_t virtual_avail;
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extern vm_offset_t virtual_end;
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#define pa_index(pa) atop(pa - vm_first_phys)
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#define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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struct pcb;
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void pmap_bootstrap __P(( vm_offset_t, vm_offset_t));
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pmap_t pmap_kernel __P((void));
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void *pmap_mapdev __P((vm_offset_t, vm_size_t));
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unsigned * __pure pmap_pte __P((pmap_t, vm_offset_t)) __pure2;
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int pmap_unuse_pt __P((pmap_t, vm_offset_t, vm_page_t));
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vm_page_t pmap_use_pt __P((pmap_t, vm_offset_t));
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#endif /* KERNEL */
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#endif /* !LOCORE */
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#endif /* !_MACHINE_PMAP_H_ */
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