204 lines
6.5 KiB
C
204 lines
6.5 KiB
C
/*
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* $FreeBSD$
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*/
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#ifndef _I810_DRM_H_
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#define _I810_DRM_H_
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/* WARNING: These defines must be the same as what the Xserver uses.
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* if you change them, you must change the defines in the Xserver.
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*/
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#ifndef _I810_DEFINES_
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#define _I810_DEFINES_
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#define I810_DMA_BUF_ORDER 12
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#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
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#define I810_DMA_BUF_NR 256
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#define I810_NR_SAREA_CLIPRECTS 8
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/* Each region is a minimum of 64k, and there are at most 64 of them.
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*/
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#define I810_NR_TEX_REGIONS 64
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#define I810_LOG_MIN_TEX_REGION_SIZE 16
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#endif
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#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
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#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
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#define I810_UPLOAD_CTX 0x4
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#define I810_UPLOAD_BUFFERS 0x8
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#define I810_UPLOAD_TEX0 0x10
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#define I810_UPLOAD_TEX1 0x20
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#define I810_UPLOAD_CLIPRECTS 0x40
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/* Indices into buf.Setup where various bits of state are mirrored per
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* context and per buffer. These can be fired at the card as a unit,
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* or in a piecewise fashion as required.
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*/
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/* Destbuffer state
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* - backbuffer linear offset and pitch -- invarient in the current dri
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* - zbuffer linear offset and pitch -- also invarient
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* - drawing origin in back and depth buffers.
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*
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* Keep the depth/back buffer state here to acommodate private buffers
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* in the future.
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*/
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#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
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#define I810_DESTREG_DI1 1
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#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
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#define I810_DESTREG_DV1 3
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#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */
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#define I810_DESTREG_DR1 5
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#define I810_DESTREG_DR2 6
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#define I810_DESTREG_DR3 7
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#define I810_DESTREG_DR4 8
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#define I810_DEST_SETUP_SIZE 10
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/* Context state
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*/
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#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */
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#define I810_CTXREG_CF1 1
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#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */
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#define I810_CTXREG_ST1 3
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#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */
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#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */
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#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
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#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
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#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
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#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
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#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
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#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
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#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */
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#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */
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#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */
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#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */
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#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
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#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */
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#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */
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#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */
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#define I810_CTX_SETUP_SIZE 20
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/* Texture state (per tex unit)
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*/
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#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */
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#define I810_TEXREG_MI1 1
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#define I810_TEXREG_MI2 2
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#define I810_TEXREG_MI3 3
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#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */
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#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */
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#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */
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#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */
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#define I810_TEX_SETUP_SIZE 8
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#define I810_FRONT 0x1
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#define I810_BACK 0x2
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#define I810_DEPTH 0x4
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typedef struct _drm_i810_init {
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enum {
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I810_INIT_DMA = 0x01,
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I810_CLEANUP_DMA = 0x02
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} func;
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#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
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int ring_map_idx;
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int buffer_map_idx;
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#else
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unsigned int mmio_offset;
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unsigned int buffers_offset;
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#endif
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int sarea_priv_offset;
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unsigned int ring_start;
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unsigned int ring_end;
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unsigned int ring_size;
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unsigned int front_offset;
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unsigned int back_offset;
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unsigned int depth_offset;
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unsigned int w;
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unsigned int h;
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unsigned int pitch;
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unsigned int pitch_bits;
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} drm_i810_init_t;
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/* Warning: If you change the SAREA structure you must change the Xserver
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* structure as well */
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typedef struct _drm_i810_tex_region {
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unsigned char next, prev; /* indices to form a circular LRU */
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unsigned char in_use; /* owned by a client, or free? */
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int age; /* tracked by clients to update local LRU's */
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} drm_i810_tex_region_t;
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typedef struct _drm_i810_sarea {
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unsigned int ContextState[I810_CTX_SETUP_SIZE];
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unsigned int BufferState[I810_DEST_SETUP_SIZE];
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unsigned int TexState[2][I810_TEX_SETUP_SIZE];
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unsigned int dirty;
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unsigned int nbox;
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drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS];
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/* Maintain an LRU of contiguous regions of texture space. If
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* you think you own a region of texture memory, and it has an
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* age different to the one you set, then you are mistaken and
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* it has been stolen by another client. If global texAge
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* hasn't changed, there is no need to walk the list.
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*
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* These regions can be used as a proxy for the fine-grained
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* texture information of other clients - by maintaining them
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* in the same lru which is used to age their own textures,
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* clients have an approximate lru for the whole of global
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* texture space, and can make informed decisions as to which
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* areas to kick out. There is no need to choose whether to
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* kick out your own texture or someone else's - simply eject
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* them all in LRU order.
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*/
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drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1];
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/* Last elt is sentinal */
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int texAge; /* last time texture was uploaded */
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int last_enqueue; /* last time a buffer was enqueued */
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int last_dispatch; /* age of the most recently dispatched buffer */
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int last_quiescent; /* */
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int ctxOwner; /* last context to upload state */
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int vertex_prim;
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} drm_i810_sarea_t;
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typedef struct _drm_i810_clear {
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int clear_color;
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int clear_depth;
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int flags;
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} drm_i810_clear_t;
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/* These may be placeholders if we have more cliprects than
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* I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to
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* false, indicating that the buffer will be dispatched again with a
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* new set of cliprects.
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*/
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typedef struct _drm_i810_vertex {
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int idx; /* buffer index */
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int used; /* nr bytes in use */
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int discard; /* client is finished with the buffer? */
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} drm_i810_vertex_t;
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typedef struct _drm_i810_copy_t {
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int idx; /* buffer index */
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int used; /* nr bytes in use */
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void *address; /* Address to copy from */
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} drm_i810_copy_t;
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typedef struct drm_i810_dma {
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void *virtual;
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int request_idx;
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int request_size;
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int granted;
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} drm_i810_dma_t;
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#endif /* _I810_DRM_H_ */
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