freebsd-dev/sys/i386/i386
Eric van Gyzen 6fba90f201 FPU init: allocate initial state from UMA to ensure alignment
The Intel Instruction Set Reference says this about the XSAVE instruction:

    Use of a destination operand not aligned to 64-byte boundary
    (in either 64-bit or 32-bit modes) results in a general-protection
    (#GP) exception.

This alignment happens naturally when all malloc buckets are powers
of two.  However, this change is necessary on some systems when
certain non-power-of-two (and non-multiple of 64) malloc buckets
are defined.

Reviewed by:	cem; kib; earlier version by jhb
MFC after:	2 weeks
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D25098
2020-06-12 21:17:56 +00:00
..
apic_vector.s
atpic_vector.s
bios.c
bioscall.s
bpf_jit_machdep.c
bpf_jit_machdep.h
copyout_fast.s
copyout.c
db_disasm.c
db_interface.c
db_trace.c
elan-mmcr.c
elf_machdep.c
exception.s
gdb_machdep.c
genassym.c
geode.c
in_cksum.c
initcpu.c
io.c
k6_mem.c
locore.s
longrun.c
machdep.c Fix boot on systems where NUMA domain 0 is unpopulated. 2020-05-28 19:41:00 +00:00
mem.c
minidump_machdep_base.c Remove an obsolete TODO comment from several minidump implementations. 2020-04-24 18:47:42 +00:00
minidump_machdep_nopae.c
minidump_machdep_pae.c
minidump_machdep.c
mp_clock.c
mp_machdep.c Fix the build after r361033 when ACPI is disabled. 2020-05-22 01:18:55 +00:00
mpboot.s
npx.c FPU init: allocate initial state from UMA to ensure alignment 2020-06-12 21:17:56 +00:00
perfmon.c
pmap_base.c
pmap_nopae.c
pmap_pae.c
pmap.c amd64 pmap: reorder IPI send and local TLB flush in TLB invalidations. 2020-06-10 22:07:57 +00:00
prof_machdep.c
ptrace_machdep.c
sigtramp.s
support.s copystr(9): Move to deprecate (attempt #2) 2020-05-25 16:40:48 +00:00
swtch.s
sys_machdep.c
trap.c
uio_machdep.c
vm86.c
vm86bios.s
vm_machdep.c amd64 pmap: reorder IPI send and local TLB flush in TLB invalidations. 2020-06-10 22:07:57 +00:00