c61b6da840
root nexus device for the CPUs as starting with UltraSPARC IV the 'cpu' nodes hang off of from 'cmp' (chip multi-threading processor) or 'core' or combinations thereof. Also in large UltraSPARC III based machines the 'cpu' nodes hang off of 'ssm' (scalable shared memory) nodes which group snooping-coherency domains together instead of directly from the nexus. It would be great if we could use newbus to deal with the different ways the 'cpu' devices can hang off of pseudo ones but unfortunately both cpu_mp_setmaxid() and sparc64_init() have to work prior to regular device probing. - Add support for UltraSPARC IV and IV+ CPUs. Due to the fact that these are multi-core each CPU has two Fireplane config registers and thus the module/target ID has to be determined differently so the one specific to a certain core is used. Similarly, starting with UltraSPARC IV the individual cores use a different property in the OFW device tree to indicate the CPU/core ID as it no longer is in coincidence with the shared slot/socket ID. This involves changing the MD KTR code to not directly read the UPA module ID either. We use the MID stored in the per-CPU data instead of calling cpu_get_mid() as a replacement in order prevent clobbering any registers as side-effect in the assembler version. This requires CATR() invocations from mp_startup() prior to mapping the per-CPU pages to be removed though. While at it additionally distinguish between CPUs with Fireplane and JBus interconnects as these also use slightly different sizes for the JBus/agent/module/target IDs. - Make sparc64_shutdown_final() static as it's not used outside of machdep.c.
42 lines
1.7 KiB
C
42 lines
1.7 KiB
C
/*-
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* Copyright (c) 2001 by Thomas Moestl <tmm@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_UPA_H_
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#define _MACHINE_UPA_H_
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#define UPA_MEMSTART 0x1c000000000UL
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#define UPA_MEMEND 0x1ffffffffffUL
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#define UPA_CR_MID_SHIFT (17)
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#define UPA_CR_MID_SIZE (5)
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#define UPA_CR_MID_MASK \
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(((1 << UPA_CR_MID_SIZE) - 1) << UPA_CR_MID_SHIFT)
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#define UPA_CR_GET_MID(cr) ((cr & UPA_CR_MID_MASK) >> UPA_CR_MID_SHIFT)
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#endif /* _MACHINE_UPA_H_ */
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