951e058411
o Add an experimental IOMMU support to xDMA framework The BERI IOMMU device is the part of CHERI device-model project [1]. It translates memory addresses for various BERI peripherals modelled in software. It accepts FreeBSD/mips64 page directories format and manages BERI TLB. 1. https://github.com/CTSRD-CHERI/device-model Sponsored by: DARPA, AFRL
153 lines
3.3 KiB
Objective-C
153 lines
3.3 KiB
Objective-C
#-
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# Copyright (c) 2016-2019 Ruslan Bukin <br@bsdpad.com>
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# All rights reserved.
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#
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# This software was developed by SRI International and the University of
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# Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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# ("CTSRD"), as part of the DARPA CRASH research programme.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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# $FreeBSD$
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#
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#include <machine/bus.h>
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#ifdef FDT
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/xdma/xdma.h>
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INTERFACE xdma;
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#
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# Request a transfer.
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#
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METHOD int channel_request {
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device_t dev;
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struct xdma_channel *xchan;
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struct xdma_request *req;
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};
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#
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# Prepare xDMA channel for a scatter-gather transfer.
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#
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METHOD int channel_prep_sg {
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device_t dev;
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struct xdma_channel *xchan;
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};
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#
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# Query DMA engine driver for the amount of free entries
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# (descriptors) are available.
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#
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METHOD int channel_capacity {
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device_t dev;
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struct xdma_channel *xchan;
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uint32_t *capacity;
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};
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#
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# Submit sglist list to DMA engine driver.
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#
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METHOD int channel_submit_sg {
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device_t dev;
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struct xdma_channel *xchan;
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struct xdma_sglist *sg;
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uint32_t sg_n;
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};
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#
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# Notify driver we have machine-dependend data.
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#
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METHOD int ofw_md_data {
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device_t dev;
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pcell_t *cells;
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int ncells;
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void **data;
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};
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#
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# Allocate both virtual and harware channels.
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#
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METHOD int channel_alloc {
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device_t dev;
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struct xdma_channel *xchan;
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};
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#
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# Free the real hardware channel.
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#
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METHOD int channel_free {
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device_t dev;
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struct xdma_channel *xchan;
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};
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#
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# Begin, pause or terminate the channel operation.
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#
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METHOD int channel_control {
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device_t dev;
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struct xdma_channel *xchan;
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int cmd;
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};
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# IOMMU interface
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#
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# pmap is initialized
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#
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METHOD int iommu_init {
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device_t dev;
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struct xdma_iommu *xio;
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};
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#
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# pmap is released
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#
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METHOD int iommu_release {
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device_t dev;
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struct xdma_iommu *xio;
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};
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#
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# Mapping entered
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#
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METHOD int iommu_enter {
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device_t dev;
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struct xdma_iommu *xio;
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vm_offset_t va;
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vm_offset_t pa;
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};
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#
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# Mapping removed
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#
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METHOD int iommu_remove {
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device_t dev;
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struct xdma_iommu *xio;
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vm_offset_t va;
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};
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