b8cb0864dc
This patch adds classes and functions that can be used with various NXP QorIQ Layerscape SoCs. As for the clock topology - there is single platform PLL, which supplies clocks for the peripheral bus and additional PLLs for CPU cores. There can be multiple core PLLs (For example - LS1046A has two PLLs - CGAPLL1 and CGAPLL2). Each PLL has fixed dividers on output. The core PLLs are not accessible from dts. This is a preparation patch for NXP LS1046A SoC support. Submitted by: Dawid Gorecki <dgr@semihalf.com> Reviewed by: mmel Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D24351
153 lines
3.9 KiB
C
153 lines
3.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2020 Alstom Group.
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* Copyright (c) 2020 Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/clk/clk_fixed.h>
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#include <arm64/qoriq/clk/qoriq_clkgen.h>
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#include "clkdev_if.h"
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struct qoriq_clk_pll_softc {
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bus_addr_t offset;
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uint32_t mask;
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uint32_t shift;
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uint32_t flags;
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};
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#define WR4(_clk, offset, val) \
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CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val)
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#define RD4(_clk, offset, val) \
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CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
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#define DEVICE_LOCK(_clk) \
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CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
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#define DEVICE_UNLOCK(_clk) \
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CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
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#define QORIQ_PLL_KILL_BIT (1 << 31)
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static int
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qoriq_clk_pll_init(struct clknode *clk, device_t dev)
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{
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clknode_init_parent_idx(clk, 0);
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return (0);
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}
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static int
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qoriq_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq)
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{
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struct qoriq_clk_pll_softc *sc;
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uint32_t mul;
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sc = clknode_get_softc(clk);
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RD4(clk, sc->offset, &mul);
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if (sc->flags & QORIQ_CLK_PLL_HAS_KILL_BIT && mul & QORIQ_PLL_KILL_BIT)
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return (0);
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mul &= sc->mask;
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mul >>= sc->shift;
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*freq = *freq * mul;
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return (0);
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}
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static clknode_method_t qoriq_clk_pll_clknode_methods[] = {
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CLKNODEMETHOD(clknode_init, qoriq_clk_pll_init),
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CLKNODEMETHOD(clknode_recalc_freq, qoriq_clk_pll_recalc_freq),
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CLKNODEMETHOD_END
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};
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DEFINE_CLASS_1(qoriq_clk_pll_clknode, qoriq_clk_pll_clknode_class,
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qoriq_clk_pll_clknode_methods, sizeof(struct qoriq_clk_pll_softc),
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clknode_class);
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int
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qoriq_clk_pll_register(struct clkdom *clkdom,
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const struct qoriq_clk_pll_def *clkdef)
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{
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char namebuf[QORIQ_CLK_NAME_MAX_LEN];
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struct qoriq_clk_pll_softc *sc;
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struct clk_fixed_def def;
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const char *parent_name;
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struct clknode *clk;
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int error;
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int i;
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clk = clknode_create(clkdom, &qoriq_clk_pll_clknode_class,
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&clkdef->clkdef);
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if (clk == NULL)
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return (1);
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sc = clknode_get_softc(clk);
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sc->mask = clkdef->mask;
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sc->shift = clkdef->shift;
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sc->flags = clkdef->flags;
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sc->offset = clkdef->offset;
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clknode_register(clkdom, clk);
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parent_name = clkdef->clkdef.name;
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def.clkdef.parent_names = &parent_name;
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def.clkdef.parent_cnt = 1;
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def.clkdef.name = namebuf;
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def.mult = 1;
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def.freq = 0;
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i = 0;
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while (clkdef->dividers[i] != 0) {
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def.div = clkdef->dividers[i];
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def.clkdef.id = clkdef->clkdef.id + i;
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snprintf(namebuf, QORIQ_CLK_NAME_MAX_LEN, "%s_div%d",
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parent_name, clkdef->dividers[i]);
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error = clknode_fixed_register(clkdom, &def);
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if (error != 0)
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return (error);
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i++;
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}
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return (0);
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}
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