52bef765d7
* Ensure we set 20MHz wide channels (hard-coded) for PHY-N. * Change the core rese tto take a flag saying "gmode" vesus uint32_t flags. This is important for BCMA support where the "gmode" bit is different. * Refactor out the mac-phy clock reset routine (usde by PHY-N). Tested: * BCM4321 (PHY-N), BCM4312 (PHY-LP) TODO: * Checkpoint test on PHY-G hardware, just to check. |
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bwn_mac.c | ||
if_bwn_chipid.h | ||
if_bwn_debug.h | ||
if_bwn_misc.h | ||
if_bwn_pci.c | ||
if_bwn_pcivar.h | ||
if_bwn_phy_common.c | ||
if_bwn_phy_common.h | ||
if_bwn_phy_g.c | ||
if_bwn_phy_g.h | ||
if_bwn_phy_lp.c | ||
if_bwn_phy_lp.h | ||
if_bwn_util.c | ||
if_bwn_util.h | ||
if_bwn.c | ||
if_bwnreg.h | ||
if_bwnvar.h |