897cd717a5
work in progress and has never booted a real machine. Initial development and testing was done using SimOS (see http://simos.stanford.edu for details). On the SimOS simulator, this port successfully reaches single-user mode and has been tested with loads as high as one copy of /bin/ls :-). Obtained from: partly from NetBSD/alpha
111 lines
3.5 KiB
C
111 lines
3.5 KiB
C
/* $Id: pte.h,v 1.1.1.1 1998/03/09 05:43:16 jb Exp $ */
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/* From: NetBSD: pte.h,v 1.10 1997/09/02 19:07:22 thorpej Exp */
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Alpha page table entry.
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* Things which are in the VMS PALcode but not in the OSF PALcode
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* are marked with "(VMS)".
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*
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* This information derived from pp. (II) 3-3 - (II) 3-6 and
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* (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
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* Richard L. Sites.
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*/
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/*
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* Alpha Page Table Entry
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*/
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#include <machine/alpha_cpu.h>
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typedef alpha_pt_entry_t pt_entry_t;
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#define PT_ENTRY_NULL ((pt_entry_t *) 0)
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#define PTESHIFT 3 /* pte size == 1 << PTESHIFT */
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#define PG_V ALPHA_PTE_VALID
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#define PG_NV 0
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#define PG_FOR ALPHA_PTE_FAULT_ON_READ
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#define PG_FOW ALPHA_PTE_FAULT_ON_WRITE
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#define PG_FOE ALPHA_PTE_FAULT_ON_EXECUTE
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#define PG_ASM ALPHA_PTE_ASM
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#define PG_GH ALPHA_PTE_GRANULARITY
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#define PG_KRE ALPHA_PTE_KR
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#define PG_URE ALPHA_PTE_UR
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#define PG_KWE ALPHA_PTE_KW
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#define PG_UWE ALPHA_PTE_UW
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#define PG_PROT ALPHA_PTE_PROT
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#define PG_RSVD 0x000000000000cc80 /* Reserved fpr hardware */
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#define PG_WIRED 0x0000000000010000 /* Wired. [SOFTWARE] */
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#define PG_FRAME ALPHA_PTE_RAME
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#define PG_SHIFT 32
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#define PG_PFNUM(x) ALPHA_PTE_TO_PFN(x)
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#if 0 /* XXX NOT HERE */
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#define K0SEG_BEGIN 0xfffffc0000000000 /* unmapped, cached */
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#define K0SEG_END 0xfffffe0000000000
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#define PHYS_UNCACHED 0x0000000040000000
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#endif
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#ifndef _LOCORE
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#if 0 /* XXX NOT HERE */
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#define k0segtophys(x) ((vm_offset_t)(x) & 0x00000003ffffffff)
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#define phystok0seg(x) ((vm_offset_t)(x) | K0SEG_BEGIN)
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#define phystouncached(x) ((vm_offset_t)(x) | PHYS_UNCACHED)
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#define uncachedtophys(x) ((vm_offset_t)(x) & ~PHYS_UNCACHED)
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#endif
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#define PTEMASK (NPTEPG - 1)
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#define vatopte(va) (((va) >> PGSHIFT) & PTEMASK)
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#define vatoste(va) (((va) >> SEGSHIFT) & PTEMASK)
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#define kvtol1pte(va) \
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(((vm_offset_t)(va) >> (PGSHIFT + 2*(PGSHIFT-PTESHIFT))) & PTEMASK)
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#define vatopa(va) \
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((PG_PFNUM(*kvtopte(va)) << PGSHIFT) | ((vm_offset_t)(va) & PGOFSET))
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#define ALPHA_STSIZE ((u_long)PAGE_SIZE) /* 8k */
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#define ALPHA_MAX_PTSIZE ((u_long)(NPTEPG * NBPG)) /* 8M */
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#ifdef _KERNEL
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/*
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* Kernel virtual address to Sysmap entry and visa versa.
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*/
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#define kvtopte(va) \
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
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extern pt_entry_t *Lev1map; /* Alpha Level One page table */
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extern pt_entry_t *Sysmap; /* kernel pte table */
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extern vm_size_t Sysmapsize; /* number of pte's in Sysmap */
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#endif
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#endif
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