e085f869d5
features of CPUs like reading/writing machine-specific registers, retrieving cpuid data, and updating microcode. - Add cpucontrol(8) utility, that provides userland access to the features of cpuctl(4). - Add subsequent manpages. The cpuctl(4) device operates as follows. The pseudo-device node cpuctlX is created for each cpu present in the systems. The pseudo-device minor number corresponds to the cpu number in the system. The cpuctl(4) pseudo- device allows a number of ioctl to be preformed, namely RDMSR/WRMSR/CPUID and UPDATE. The first pair alows the caller to read/write machine-specific registers from the correspondent CPU. cpuid data could be retrieved using the CPUID call, and microcode updates are applied via UPDATE. The permissions are inforced based on the pseudo-device file permissions. RDMSR/CPUID will be allowed when the caller has read access to the device node, while WRMSR/UPDATE will be granted only when the node is opened for writing. There're also a number of priv(9) checks. The cpucontrol(8) utility is intened to provide userland access to the cpuctl(4) device features. The utility also allows one to apply cpu microcode updates. Currently only Intel and AMD cpus are supported and were tested. Approved by: kib Reviewed by: rpaulo, cokane, Peter Jeremy MFC after: 1 month
184 lines
4.5 KiB
C
184 lines
4.5 KiB
C
/*-
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* Copyright (c) 2006, 2008 Stanislav Sedov <stas@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <assert.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <err.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/mman.h>
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#include <sys/ioctl.h>
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#include <sys/ioccom.h>
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#include <sys/cpuctl.h>
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#include <machine/cpufunc.h>
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#include <machine/specialreg.h>
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#include "cpucontrol.h"
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#include "amd.h"
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int
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amd_probe(int fd)
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{
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char vendor[13];
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int error;
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cpuctl_cpuid_args_t idargs = {
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.level = 0,
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};
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error = ioctl(fd, CPUCTL_CPUID, &idargs);
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if (error < 0) {
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WARN(0, "ioctl()");
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return (1);
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}
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((uint32_t *)vendor)[0] = idargs.data[1];
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((uint32_t *)vendor)[1] = idargs.data[3];
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((uint32_t *)vendor)[2] = idargs.data[2];
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vendor[12] = '\0';
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if (strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) != 0)
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return (1);
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return (0);
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}
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void
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amd_update(const char *dev, const char *path)
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{
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int fd, devfd;
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unsigned int i;
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struct stat st;
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uint32_t *fw_image;
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amd_fw_header_t *fw_header;
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uint32_t sum;
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uint32_t signature;
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uint32_t *fw_data;
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size_t fw_size;
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cpuctl_cpuid_args_t idargs = {
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.level = 1, /* Request signature. */
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};
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cpuctl_update_args_t args;
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int error;
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assert(path);
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assert(dev);
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fd = -1;
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devfd = -1;
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fw_image = MAP_FAILED;
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error = 0;
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devfd = open(dev, O_RDWR);
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if (devfd < 0) {
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WARN(0, "could not open %s for writing", dev);
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return;
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}
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error = ioctl(devfd, CPUCTL_CPUID, &idargs);
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if (error < 0) {
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WARN(0, "ioctl()");
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goto fail;
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}
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signature = idargs.data[0];
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WARNX(2, "found cpu family %#x model %#x "
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"stepping %#x extfamily %#x extmodel %#x.",
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(signature >> 8) & 0x0f, (signature >> 4) & 0x0f,
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(signature >> 0) & 0x0f, (signature >> 20) & 0xff,
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(signature >> 16) & 0x0f);
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/*
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* Open the firmware file.
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*/
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fd = open(path, O_RDONLY, 0);
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if (fd < 0) {
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WARN(0, "open(%s)", path);
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goto fail;
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}
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error = fstat(fd, &st);
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if (error != 0) {
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WARN(0, "fstat(%s)", path);
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goto fail;
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}
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if (st.st_size < 0 || (unsigned)st.st_size < sizeof(*fw_header)) {
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WARNX(2, "file too short: %s", path);
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goto fail;
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}
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/*
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* mmap the whole image.
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*/
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fw_image = (uint32_t *)mmap(NULL, st.st_size, PROT_READ,
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MAP_PRIVATE, fd, 0);
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if (fw_image == MAP_FAILED) {
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WARN(0, "mmap(%s)", path);
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goto fail;
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}
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fw_header = (amd_fw_header_t *)fw_image;
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if ((fw_header->magic >> 8) != AMD_MAGIC) {
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WARNX(2, "%s is not a valid amd firmware: version mismatch",
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path);
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goto fail;
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}
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fw_data = (uint32_t *)(fw_header + 1);
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fw_size = (st.st_size - sizeof(*fw_header)) / sizeof(uint32_t);
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/*
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* Check the primary checksum.
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*/
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sum = 0;
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for (i = 0; i < fw_size; i++)
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sum += fw_data[i];
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if (sum != fw_header->checksum) {
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WARNX(2, "%s: update data checksum invalid", path);
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goto fail;
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}
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if (signature == fw_header->signature) {
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fprintf(stderr, "%s: updating cpu %s... ", path, dev);
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args.data = fw_image;
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args.size = st.st_size;
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error = ioctl(fd, CPUCTL_UPDATE, &args);
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if (error < 0) {
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fprintf(stderr, "failed.\n");
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warn("ioctl()");
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goto fail;
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}
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fprintf(stderr, "done.\n");
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}
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fail:
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if (fd >= 0)
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close(fd);
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if (devfd >= 0)
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close(devfd);
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if (fw_image != MAP_FAILED)
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if(munmap(fw_image, st.st_size) != 0)
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warn("munmap(%s)", path);
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return;
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}
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