140 lines
3.5 KiB
C
140 lines
3.5 KiB
C
#ifndef __XEN_SYNCH_BITOPS_H__
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#define __XEN_SYNCH_BITOPS_H__
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/*
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* Copyright 1992, Linus Torvalds.
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* Heavily modified to provide guaranteed strong synchronisation
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* when communicating with Xen or other guest OSes running on other CPUs.
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*/
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#define ADDR (*(volatile long *) addr)
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static __inline__ void synch_set_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__ (
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"lock btsl %1,%0"
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: "=m" (ADDR) : "Ir" (nr) : "memory" );
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}
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static __inline__ void synch_clear_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__ (
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"lock btrl %1,%0"
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: "=m" (ADDR) : "Ir" (nr) : "memory" );
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}
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static __inline__ void synch_change_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__ (
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"lock btcl %1,%0"
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: "=m" (ADDR) : "Ir" (nr) : "memory" );
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}
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static __inline__ int synch_test_and_set_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__ (
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"lock btsl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR) : "Ir" (nr) : "memory");
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return oldbit;
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}
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static __inline__ int synch_test_and_clear_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__ (
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"lock btrl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR) : "Ir" (nr) : "memory");
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return oldbit;
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}
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static __inline__ int synch_test_and_change_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__ (
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"lock btcl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR) : "Ir" (nr) : "memory");
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return oldbit;
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}
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struct __synch_xchg_dummy { unsigned long a[100]; };
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#define __synch_xg(x) ((volatile struct __synch_xchg_dummy *)(x))
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#define synch_cmpxchg(ptr, old, new) \
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((__typeof__(*(ptr)))__synch_cmpxchg((ptr),\
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(unsigned long)(old), \
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(unsigned long)(new), \
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sizeof(*(ptr))))
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static inline unsigned long __synch_cmpxchg(volatile void *ptr,
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unsigned long old,
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unsigned long new, int size)
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{
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unsigned long prev;
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switch (size) {
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case 1:
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__asm__ __volatile__("lock; cmpxchgb %b1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__synch_xg(ptr)),
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"0"(old)
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: "memory");
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return prev;
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case 2:
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__asm__ __volatile__("lock; cmpxchgw %w1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__synch_xg(ptr)),
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"0"(old)
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: "memory");
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return prev;
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#ifdef CONFIG_X86_64
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case 4:
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__asm__ __volatile__("lock; cmpxchgl %k1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__synch_xg(ptr)),
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"0"(old)
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: "memory");
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return prev;
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case 8:
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__asm__ __volatile__("lock; cmpxchgq %1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__synch_xg(ptr)),
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"0"(old)
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: "memory");
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return prev;
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#else
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case 4:
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__asm__ __volatile__("lock; cmpxchgl %1,%2"
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: "=a"(prev)
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: "q"(new), "m"(*__synch_xg(ptr)),
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"0"(old)
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: "memory");
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return prev;
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#endif
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}
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return old;
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}
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static __inline__ int synch_const_test_bit(int nr, const volatile void * addr)
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{
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return ((1UL << (nr & 31)) &
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(((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline__ int synch_var_test_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__ (
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"btl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit) : "m" (ADDR), "Ir" (nr) );
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return oldbit;
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}
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#define synch_test_bit(nr,addr) \
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(__builtin_constant_p(nr) ? \
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synch_const_test_bit((nr),(addr)) : \
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synch_var_test_bit((nr),(addr)))
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#endif /* __XEN_SYNCH_BITOPS_H__ */
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