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mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
79 lines
2.7 KiB
C
79 lines
2.7 KiB
C
/* $OpenBSD: reg.h,v 1.1 1998/01/28 11:14:53 pefo Exp $ */
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/*-
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah Hdr: reg.h 1.1 90/07/09
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* @(#)reg.h 8.2 (Berkeley) 1/11/94
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* JNPR: reg.h,v 1.6 2006/09/15 12:52:34 katta
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* $FreeBSD$
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*/
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#ifndef _MACHINE_REG_H_
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#define _MACHINE_REG_H_
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/*
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* Location of the users' stored registers relative to ZERO.
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* must be visible to assembly code.
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*/
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#include <machine/regnum.h>
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/*
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* Register set accessible via /proc/$pid/reg
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*/
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struct reg {
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register_t r_regs[NUMSAVEREGS]; /* numbered as above */
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};
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struct fpreg {
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f_register_t r_regs[NUMFPREGS];
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};
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/*
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* Placeholder.
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*/
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struct dbreg {
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unsigned long junk;
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};
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#ifdef _KERNEL
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int fill_fpregs(struct thread *, struct fpreg *);
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int fill_regs(struct thread *, struct reg *);
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int set_fpregs(struct thread *, struct fpreg *);
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int set_regs(struct thread *, struct reg *);
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int fill_dbregs(struct thread *, struct dbreg *);
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int set_dbregs(struct thread *, struct dbreg *);
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#endif
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#endif /* !_MACHINE_REG_H_ */
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