bed90bf8ed
The NAV (network allocation vector) register reflects the current MAC tracking of NAV - when it will stay quiet before transmitting. Other devices transmit their frame durations in their 802.11 PHY headers and all devices that hear a frame - even if it's one in an encoding they don't understand - will understand the low bitrate PHY header that includes the frame duration. So, they'll set NAV to this value so they'll stay quiet until the transmit completes. Anyway, sometimes the PHY NAV header is garbled and sometimes, notably older broadcom devices, will fake a long NAV so they can get "cleaner" air for local calibration. When this happens, the hardware will stay quiet for quite some time and this can lead to missed/stuck beacons, or (for Very Large Values) a MAC hang. This code just adds the ability to get/set the NAV; the driver will need to take care of using it during transmit hangs and beacon misses to see if it's due to a trash looking NAV.
559 lines
17 KiB
C
559 lines
17 KiB
C
/*-
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* SPDX-License-Identifier: ISC
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*
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2006 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_devid.h"
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#include "ar5211/ar5211.h"
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#include "ar5211/ar5211reg.h"
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#include "ar5211/ar5211phy.h"
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#include "ah_eeprom_v3.h"
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static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
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uint16_t flags, uint16_t *low, uint16_t *high);
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static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
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struct ieee80211_channel *chan);
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static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar5211DisablePCIE(struct ath_hal *ah);
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static const struct ath_hal_private ar5211hal = {{
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.ah_magic = AR5211_MAGIC,
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.ah_getRateTable = ar5211GetRateTable,
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.ah_detach = ar5211Detach,
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/* Reset Functions */
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.ah_reset = ar5211Reset,
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.ah_phyDisable = ar5211PhyDisable,
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.ah_disable = ar5211Disable,
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.ah_configPCIE = ar5211ConfigPCIE,
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.ah_disablePCIE = ar5211DisablePCIE,
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.ah_setPCUConfig = ar5211SetPCUConfig,
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.ah_perCalibration = ar5211PerCalibration,
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.ah_perCalibrationN = ar5211PerCalibrationN,
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.ah_resetCalValid = ar5211ResetCalValid,
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.ah_setTxPowerLimit = ar5211SetTxPowerLimit,
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.ah_getChanNoise = ath_hal_getChanNoise,
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/* Transmit functions */
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.ah_updateTxTrigLevel = ar5211UpdateTxTrigLevel,
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.ah_setupTxQueue = ar5211SetupTxQueue,
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.ah_setTxQueueProps = ar5211SetTxQueueProps,
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.ah_getTxQueueProps = ar5211GetTxQueueProps,
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.ah_releaseTxQueue = ar5211ReleaseTxQueue,
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.ah_resetTxQueue = ar5211ResetTxQueue,
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.ah_getTxDP = ar5211GetTxDP,
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.ah_setTxDP = ar5211SetTxDP,
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.ah_numTxPending = ar5211NumTxPending,
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.ah_startTxDma = ar5211StartTxDma,
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.ah_stopTxDma = ar5211StopTxDma,
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.ah_setupTxDesc = ar5211SetupTxDesc,
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.ah_setupXTxDesc = ar5211SetupXTxDesc,
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.ah_fillTxDesc = ar5211FillTxDesc,
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.ah_procTxDesc = ar5211ProcTxDesc,
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.ah_getTxIntrQueue = ar5211GetTxIntrQueue,
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.ah_reqTxIntrDesc = ar5211IntrReqTxDesc,
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.ah_getTxCompletionRates = ar5211GetTxCompletionRates,
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.ah_setTxDescLink = ar5211SetTxDescLink,
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.ah_getTxDescLink = ar5211GetTxDescLink,
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.ah_getTxDescLinkPtr = ar5211GetTxDescLinkPtr,
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/* RX Functions */
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.ah_getRxDP = ar5211GetRxDP,
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.ah_setRxDP = ar5211SetRxDP,
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.ah_enableReceive = ar5211EnableReceive,
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.ah_stopDmaReceive = ar5211StopDmaReceive,
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.ah_startPcuReceive = ar5211StartPcuReceive,
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.ah_stopPcuReceive = ar5211StopPcuReceive,
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.ah_setMulticastFilter = ar5211SetMulticastFilter,
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.ah_setMulticastFilterIndex = ar5211SetMulticastFilterIndex,
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.ah_clrMulticastFilterIndex = ar5211ClrMulticastFilterIndex,
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.ah_getRxFilter = ar5211GetRxFilter,
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.ah_setRxFilter = ar5211SetRxFilter,
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.ah_setupRxDesc = ar5211SetupRxDesc,
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.ah_procRxDesc = ar5211ProcRxDesc,
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.ah_rxMonitor = ar5211RxMonitor,
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.ah_aniPoll = ar5211AniPoll,
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.ah_procMibEvent = ar5211MibEvent,
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/* Misc Functions */
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.ah_getCapability = ar5211GetCapability,
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.ah_setCapability = ar5211SetCapability,
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.ah_getDiagState = ar5211GetDiagState,
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.ah_getMacAddress = ar5211GetMacAddress,
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.ah_setMacAddress = ar5211SetMacAddress,
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.ah_getBssIdMask = ar5211GetBssIdMask,
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.ah_setBssIdMask = ar5211SetBssIdMask,
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.ah_setRegulatoryDomain = ar5211SetRegulatoryDomain,
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.ah_setLedState = ar5211SetLedState,
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.ah_writeAssocid = ar5211WriteAssocid,
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.ah_gpioCfgInput = ar5211GpioCfgInput,
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.ah_gpioCfgOutput = ar5211GpioCfgOutput,
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.ah_gpioGet = ar5211GpioGet,
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.ah_gpioSet = ar5211GpioSet,
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.ah_gpioSetIntr = ar5211GpioSetIntr,
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.ah_getTsf32 = ar5211GetTsf32,
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.ah_getTsf64 = ar5211GetTsf64,
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.ah_resetTsf = ar5211ResetTsf,
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.ah_detectCardPresent = ar5211DetectCardPresent,
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.ah_updateMibCounters = ar5211UpdateMibCounters,
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.ah_getRfGain = ar5211GetRfgain,
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.ah_getDefAntenna = ar5211GetDefAntenna,
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.ah_setDefAntenna = ar5211SetDefAntenna,
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.ah_getAntennaSwitch = ar5211GetAntennaSwitch,
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.ah_setAntennaSwitch = ar5211SetAntennaSwitch,
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.ah_setSifsTime = ar5211SetSifsTime,
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.ah_getSifsTime = ar5211GetSifsTime,
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.ah_setSlotTime = ar5211SetSlotTime,
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.ah_getSlotTime = ar5211GetSlotTime,
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.ah_setAckTimeout = ar5211SetAckTimeout,
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.ah_getAckTimeout = ar5211GetAckTimeout,
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.ah_setAckCTSRate = ar5211SetAckCTSRate,
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.ah_getAckCTSRate = ar5211GetAckCTSRate,
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.ah_setCTSTimeout = ar5211SetCTSTimeout,
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.ah_getCTSTimeout = ar5211GetCTSTimeout,
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.ah_setDecompMask = ar5211SetDecompMask,
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.ah_setCoverageClass = ar5211SetCoverageClass,
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.ah_setQuiet = ar5211SetQuiet,
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.ah_get11nExtBusy = ar5211Get11nExtBusy,
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.ah_getMibCycleCounts = ar5211GetMibCycleCounts,
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.ah_setChainMasks = ar5211SetChainMasks,
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.ah_enableDfs = ar5211EnableDfs,
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.ah_getDfsThresh = ar5211GetDfsThresh,
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/* XXX procRadarEvent */
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/* XXX isFastClockEnabled */
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.ah_setNav = ar5211SetNav,
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.ah_getNav = ar5211GetNav,
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/* Key Cache Functions */
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.ah_getKeyCacheSize = ar5211GetKeyCacheSize,
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.ah_resetKeyCacheEntry = ar5211ResetKeyCacheEntry,
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.ah_isKeyCacheEntryValid = ar5211IsKeyCacheEntryValid,
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.ah_setKeyCacheEntry = ar5211SetKeyCacheEntry,
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.ah_setKeyCacheEntryMac = ar5211SetKeyCacheEntryMac,
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/* Power Management Functions */
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.ah_setPowerMode = ar5211SetPowerMode,
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.ah_getPowerMode = ar5211GetPowerMode,
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/* Beacon Functions */
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.ah_setBeaconTimers = ar5211SetBeaconTimers,
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.ah_beaconInit = ar5211BeaconInit,
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.ah_setStationBeaconTimers = ar5211SetStaBeaconTimers,
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.ah_resetStationBeaconTimers = ar5211ResetStaBeaconTimers,
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.ah_getNextTBTT = ar5211GetNextTBTT,
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/* Interrupt Functions */
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.ah_isInterruptPending = ar5211IsInterruptPending,
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.ah_getPendingInterrupts = ar5211GetPendingInterrupts,
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.ah_getInterrupts = ar5211GetInterrupts,
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.ah_setInterrupts = ar5211SetInterrupts },
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.ah_getChannelEdges = ar5211GetChannelEdges,
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.ah_getWirelessModes = ar5211GetWirelessModes,
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.ah_eepromRead = ar5211EepromRead,
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#ifdef AH_SUPPORT_WRITE_EEPROM
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.ah_eepromWrite = ar5211EepromWrite,
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#endif
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.ah_getChipPowerLimits = ar5211GetChipPowerLimits,
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};
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static HAL_BOOL ar5211ChipTest(struct ath_hal *);
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static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah);
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/*
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* Return the revsion id for the radio chip. This
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* fetched via the PHY.
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*/
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static uint32_t
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ar5211GetRadioRev(struct ath_hal *ah)
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{
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uint32_t val;
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int i;
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OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16);
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for (i = 0; i < 8; i++)
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OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000);
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val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
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val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
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return ath_hal_reverseBits(val, 8);
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}
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/*
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* Attach for an AR5211 part.
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*/
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static struct ath_hal *
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ar5211Attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
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{
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#define N(a) (sizeof(a)/sizeof(a[0]))
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struct ath_hal_5211 *ahp;
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struct ath_hal *ah;
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uint32_t val;
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uint16_t eeval;
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HAL_STATUS ecode;
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HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
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__func__, sc, (void*) st, (void*) sh);
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/* NB: memory is returned zero'd */
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ahp = ath_hal_malloc(sizeof (struct ath_hal_5211));
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if (ahp == AH_NULL) {
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HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
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"%s: cannot allocate memory for state block\n", __func__);
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ecode = HAL_ENOMEM;
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goto bad;
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}
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ah = &ahp->ah_priv.h;
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/* set initial values */
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OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private));
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ah->ah_sc = sc;
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ah->ah_st = st;
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ah->ah_sh = sh;
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ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */
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AH_PRIVATE(ah)->ah_devid = devid;
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AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */
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AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
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AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */
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ahp->ah_diversityControl = HAL_ANT_VARIABLE;
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ahp->ah_staId1Defaults = 0;
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ahp->ah_rssiThr = INIT_RSSI_THR;
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ahp->ah_sifstime = (u_int) -1;
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ahp->ah_slottime = (u_int) -1;
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ahp->ah_acktimeout = (u_int) -1;
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ahp->ah_ctstimeout = (u_int) -1;
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if (!ar5211ChipReset(ah, AH_NULL)) { /* reset chip */
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
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ecode = HAL_EIO;
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goto bad;
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}
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if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) {
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/* set it back to OFDM mode to be able to read analog rev id */
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OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM);
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OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
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OS_DELAY(1000);
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}
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/* Read Revisions from Chips */
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val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
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AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
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AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;
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if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 ||
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AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: Mac Chip Rev 0x%x is not supported by this driver\n",
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__func__, AH_PRIVATE(ah)->ah_macVersion);
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ecode = HAL_ENOTSUPP;
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goto bad;
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}
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AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
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if (!ar5211ChipTest(ah)) {
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
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__func__);
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ecode = HAL_ESELFTEST;
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goto bad;
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}
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/* Set correct Baseband to analog shift setting to access analog chips. */
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if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) {
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OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
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} else {
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OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047);
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}
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OS_DELAY(2000);
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/* Read Radio Chip Rev Extract */
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AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah);
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if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: 5G Radio Chip Rev 0x%02X is not supported by this "
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"driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
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ecode = HAL_ENOTSUPP;
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goto bad;
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}
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val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>
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AR_PCICFG_EEPROM_SIZE_S;
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if (val != AR_PCICFG_EEPROM_SIZE_16K) {
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HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size "
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"%u (0x%x) found\n", __func__, val, val);
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ecode = HAL_EESIZE;
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goto bad;
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}
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ecode = ath_hal_legacyEepromAttach(ah);
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if (ecode != HAL_OK) {
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goto bad;
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}
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/* If Bmode and AR5211, verify 2.4 analog exists */
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if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU &&
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ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
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/* Set correct Baseband to analog shift setting to access analog chips. */
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OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007);
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OS_DELAY(2000);
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AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah);
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/* Set baseband for 5GHz chip */
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OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
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OS_DELAY(2000);
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if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: 2G Radio Chip Rev 0x%x is not supported by "
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"this driver\n", __func__,
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AH_PRIVATE(ah)->ah_analog2GhzRev);
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ecode = HAL_ENOTSUPP;
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goto bad;
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}
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} else {
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ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE);
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}
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ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
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if (ecode != HAL_OK) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: cannot read regulatory domain from EEPROM\n",
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__func__);
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goto bad;
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}
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AH_PRIVATE(ah)->ah_currentRD = eeval;
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AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust;
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/*
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* Got everything we need now to setup the capabilities.
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*/
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(void) ar5211FillCapabilityInfo(ah);
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/* Initialize gain ladder thermal calibration structure */
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ar5211InitializeGainValues(ah);
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ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
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if (ecode != HAL_OK) {
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HALDEBUG(ah, HAL_DEBUG_ANY,
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"%s: error getting mac address from EEPROM\n", __func__);
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goto bad;
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}
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HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
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return ah;
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bad:
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if (ahp)
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ar5211Detach((struct ath_hal *) ahp);
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if (status)
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*status = ecode;
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return AH_NULL;
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#undef N
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}
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void
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ar5211Detach(struct ath_hal *ah)
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{
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HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
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HALASSERT(ah != AH_NULL);
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HALASSERT(ah->ah_magic == AR5211_MAGIC);
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ath_hal_eepromDetach(ah);
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ath_hal_free(ah);
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}
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static HAL_BOOL
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ar5211ChipTest(struct ath_hal *ah)
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{
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uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
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uint32_t regHold[2];
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uint32_t patternData[4] =
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{ 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
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int i, j;
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/* Test PHY & MAC registers */
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for (i = 0; i < 2; i++) {
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uint32_t addr = regAddr[i];
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uint32_t wrData, rdData;
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regHold[i] = OS_REG_READ(ah, addr);
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for (j = 0; j < 0x100; j++) {
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wrData = (j << 16) | j;
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OS_REG_WRITE(ah, addr, wrData);
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rdData = OS_REG_READ(ah, addr);
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if (rdData != wrData) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANY,
|
|
"%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
|
|
__func__, addr, wrData, rdData);
|
|
return AH_FALSE;
|
|
}
|
|
}
|
|
for (j = 0; j < 4; j++) {
|
|
wrData = patternData[j];
|
|
OS_REG_WRITE(ah, addr, wrData);
|
|
rdData = OS_REG_READ(ah, addr);
|
|
if (wrData != rdData) {
|
|
HALDEBUG(ah, HAL_DEBUG_ANY,
|
|
"%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
|
|
__func__, addr, wrData, rdData);
|
|
return AH_FALSE;
|
|
}
|
|
}
|
|
OS_REG_WRITE(ah, regAddr[i], regHold[i]);
|
|
}
|
|
OS_DELAY(100);
|
|
return AH_TRUE;
|
|
}
|
|
|
|
/*
|
|
* Store the channel edges for the requested operational mode
|
|
*/
|
|
static HAL_BOOL
|
|
ar5211GetChannelEdges(struct ath_hal *ah,
|
|
uint16_t flags, uint16_t *low, uint16_t *high)
|
|
{
|
|
if (flags & IEEE80211_CHAN_5GHZ) {
|
|
*low = 4920;
|
|
*high = 6100;
|
|
return AH_TRUE;
|
|
}
|
|
if (flags & IEEE80211_CHAN_2GHZ &&
|
|
ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
|
|
*low = 2312;
|
|
*high = 2732;
|
|
return AH_TRUE;
|
|
}
|
|
return AH_FALSE;
|
|
}
|
|
|
|
static HAL_BOOL
|
|
ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
|
|
{
|
|
/* XXX fill in, this is just a placeholder */
|
|
HALDEBUG(ah, HAL_DEBUG_ATTACH,
|
|
"%s: no min/max power for %u/0x%x\n",
|
|
__func__, chan->ic_freq, chan->ic_flags);
|
|
chan->ic_maxpower = MAX_RATE_POWER;
|
|
chan->ic_minpower = 0;
|
|
return AH_TRUE;
|
|
}
|
|
|
|
static void
|
|
ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
|
|
{
|
|
}
|
|
|
|
static void
|
|
ar5211DisablePCIE(struct ath_hal *ah)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Fill all software cached or static hardware state information.
|
|
*/
|
|
static HAL_BOOL
|
|
ar5211FillCapabilityInfo(struct ath_hal *ah)
|
|
{
|
|
struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
|
|
HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
|
|
|
|
/* Construct wireless mode from EEPROM */
|
|
pCap->halWirelessModes = 0;
|
|
if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
|
|
pCap->halWirelessModes |= HAL_MODE_11A;
|
|
if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
|
|
pCap->halWirelessModes |= HAL_MODE_TURBO;
|
|
}
|
|
if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
|
|
pCap->halWirelessModes |= HAL_MODE_11B;
|
|
|
|
pCap->halLow2GhzChan = 2312;
|
|
pCap->halHigh2GhzChan = 2732;
|
|
pCap->halLow5GhzChan = 4920;
|
|
pCap->halHigh5GhzChan = 6100;
|
|
|
|
pCap->halChanSpreadSupport = AH_TRUE;
|
|
pCap->halSleepAfterBeaconBroken = AH_TRUE;
|
|
pCap->halPSPollBroken = AH_TRUE;
|
|
pCap->halVEOLSupport = AH_TRUE;
|
|
pCap->halNumMRRetries = 1; /* No hardware MRR support */
|
|
pCap->halNumTxMaps = 1; /* Single TX ptr per descr */
|
|
|
|
pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
|
|
pCap->halKeyCacheSize = 128;
|
|
|
|
/* XXX not needed */
|
|
pCap->halChanHalfRate = AH_FALSE;
|
|
pCap->halChanQuarterRate = AH_FALSE;
|
|
|
|
/*
|
|
* RSSI uses the combined field; some 11n NICs may use
|
|
* the control chain RSSI.
|
|
*/
|
|
pCap->halUseCombinedRadarRssi = AH_TRUE;
|
|
|
|
if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
|
|
ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
|
|
/* NB: enabled by default */
|
|
ahpriv->ah_rfkillEnabled = AH_TRUE;
|
|
pCap->halRfSilentSupport = AH_TRUE;
|
|
}
|
|
|
|
pCap->halRxTstampPrecision = 13;
|
|
pCap->halTxTstampPrecision = 16;
|
|
pCap->halIntrMask = HAL_INT_COMMON
|
|
| HAL_INT_RX
|
|
| HAL_INT_TX
|
|
| HAL_INT_FATAL
|
|
| HAL_INT_BNR
|
|
| HAL_INT_TIM
|
|
;
|
|
|
|
pCap->hal4kbSplitTransSupport = AH_TRUE;
|
|
pCap->halHasRxSelfLinkedTail = AH_TRUE;
|
|
|
|
/* XXX might be ok w/ some chip revs */
|
|
ahpriv->ah_rxornIsFatal = AH_TRUE;
|
|
return AH_TRUE;
|
|
}
|
|
|
|
static const char*
|
|
ar5211Probe(uint16_t vendorid, uint16_t devid)
|
|
{
|
|
if (vendorid == ATHEROS_VENDOR_ID) {
|
|
if (devid == AR5211_DEVID || devid == AR5311_DEVID ||
|
|
devid == AR5211_DEFAULT)
|
|
return "Atheros 5211";
|
|
if (devid == AR5211_FPGA11B)
|
|
return "Atheros 5211 (FPGA)";
|
|
}
|
|
return AH_NULL;
|
|
}
|
|
AH_CHIP(AR5211, ar5211Probe, ar5211Attach);
|