718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
273 lines
9.6 KiB
C
273 lines
9.6 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SCIC_SDS_PHY_REGISTERS_H_
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#define _SCIC_SDS_PHY_REGISTERS_H_
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/**
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* @file
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*
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* @brief This file contains the macros used by the phy object to read/write
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* to the SCU link layer registers.
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif // __cplusplus
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#include <dev/isci/scil/scic_sds_controller.h>
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//*****************************************************************************
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//* SCU LINK LAYER REGISTER OPERATIONS
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//*****************************************************************************
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/**
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* Macro to read the transport layer register associated with this phy
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* object.
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*/
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#define scu_transport_layer_read(phy, reg) \
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scu_register_read( \
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scic_sds_phy_get_controller(phy), \
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(phy)->transport_layer_registers->reg \
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)
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/**
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* Macro to write the transport layer register associated with this phy
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* object.
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*/
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#define scu_transport_layer_write(phy, reg, value) \
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scu_register_write( \
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scic_sds_phy_get_controller(phy), \
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(phy)->transport_layer_registers->reg, \
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(value) \
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)
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//****************************************************************************
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//* Transport Layer registers controlled by the phy object
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//****************************************************************************
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/**
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* This macro reads the Transport layer control register
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*/
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#define SCU_TLCR_READ(phy) \
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scu_transport_layer_read(phy, control)
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/**
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* This macro writes the Transport layer control register
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*/
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#define SCU_TLCR_WRITE(phy, value) \
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scu_transport_layer_write(phy, control, value)
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/**
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* This macro reads the Transport layer address translation register
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*/
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#define SCU_TLADTR_READ(phy) \
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scu_transport_layer_read(phy, address_translation)
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/**
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* This macro writes the Transport layer address translation register
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*/
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#define SCU_TLADTR_WRITE(phy) \
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scu_transport_layer_write(phy, address_translation, value)
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/**
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* This macro writes the STP Transport Layer Direct Attached RNi register.
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*/
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#define SCU_STPTLDARNI_WRITE(phy, index) \
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scu_transport_layer_write(phy, stp_rni, index)
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/**
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* This macro reads the STP Transport Layer Direct Attached RNi register.
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*/
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#define SCU_STPTLDARNI_READ(phy) \
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scu_transport_layer_read(phy, stp_rni)
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//*****************************************************************************
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//* SCU LINK LAYER REGISTER OPERATIONS
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//*****************************************************************************
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/**
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* THis macro requests the SCU register write for the specified link layer
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* register.
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*/
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#define scu_link_layer_register_read(phy, reg) \
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scu_register_read( \
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scic_sds_phy_get_controller(phy), \
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(phy)->link_layer_registers->reg \
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)
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/**
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* This macro requests the SCU register read for the specified link layer
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* register.
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*/
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#define scu_link_layer_register_write(phy, reg, value) \
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scu_register_write( \
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scic_sds_phy_get_controller(phy), \
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(phy)->link_layer_registers->reg, \
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(value) \
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)
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//*****************************************************************************
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//* SCU LINK LAYER REGISTERS
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//*****************************************************************************
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/// This macro reads from the SAS Identify Frame PHY Identifier register
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#define SCU_SAS_TIPID_READ(phy) \
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scu_link_layer_register_read(phy, identify_frame_phy_id)
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/// This macro writes to the SAS Identify Frame PHY Identifier register
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#define SCU_SAS_TIPID_WRITE(phy, value) \
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scu_link_layer_register_write(phy, identify_frame_phy_id, value)
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/// This macro reads from the SAS Identification register
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#define SCU_SAS_TIID_READ(phy) \
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scu_link_layer_register_read(phy, transmit_identification)
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/// This macro writes to the SAS Identification register
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#define SCU_SAS_TIID_WRITE(phy, value) \
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scu_link_layer_register_write(phy, transmit_identification, value)
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/// This macro reads the SAS Device Name High register
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#define SCU_SAS_TIDNH_READ(phy) \
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scu_link_layer_register_read(phy, sas_device_name_high)
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/// This macro writes the SAS Device Name High register
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#define SCU_SAS_TIDNH_WRITE(phy, value) \
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scu_link_layer_register_write(phy, sas_device_name_high, value)
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/// This macro reads the SAS Device Name Low register
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#define SCU_SAS_TIDNL_READ(phy) \
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scu_link_layer_register_read(phy, sas_device_name_low)
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/// This macro writes the SAS Device Name Low register
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#define SCU_SAS_TIDNL_WRITE(phy, value) \
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scu_link_layer_register_write(phy, sas_device_name_low, value)
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/// This macro reads the Source SAS Address High register
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#define SCU_SAS_TISSAH_READ(phy) \
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scu_link_layer_register_read(phy, source_sas_address_high)
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/// This macro writes the Source SAS Address High register
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#define SCU_SAS_TISSAH_WRITE(phy, value) \
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scu_link_layer_register_write(phy, source_sas_address_high, value)
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/// This macro reads the Source SAS Address Low register
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#define SCU_SAS_TISSAL_READ(phy) \
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scu_link_layer_register_read(phy, source_sas_address_low)
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/// This macro writes the Source SAS Address Low register
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#define SCU_SAS_TISSAL_WRITE(phy, value) \
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scu_link_layer_register_write(phy, source_sas_address_low, value)
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/// This macro reads the PHY Configuration register
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#define SCU_SAS_PCFG_READ(phy) \
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scu_link_layer_register_read(phy, phy_configuration);
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/// This macro writes the PHY Configuration register
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#define SCU_SAS_PCFG_WRITE(phy, value) \
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scu_link_layer_register_write(phy, phy_configuration, value)
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/// This macro reads the PHY Enable Spinup register
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#define SCU_SAS_ENSPINUP_READ(phy) \
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scu_link_layer_register_read(phy, notify_enable_spinup_control)
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/// This macro writes the PHY Enable Spinup register
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#define SCU_SAS_ENSPINUP_WRITE(phy, value) \
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scu_link_layer_register_write(phy, notify_enable_spinup_control, value)
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/// This macro reads the CLKSM register
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#define SCU_SAS_CLKSM_READ(phy) \
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scu_link_layer_register_read(phy, clock_skew_management)
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/// This macro writes the CLKSM register
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#define SCU_SAS_CLKSM_WRITE(phy, value) \
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scu_link_layer_register_write(phy, clock_skew_management, value)
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/// This macro reads the PHY Capacity register
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#define SCU_SAS_PHYCAP_READ(phy) \
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scu_link_layer_register_read(phy, phy_capabilities)
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/// This macro writes the PHY Capacity register
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#define SCU_SAS_PHYCAP_WRITE(phy, value) \
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scu_link_layer_register_write(phy, phy_capabilities, value)
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/// This macro reads the Received PHY Capacity register
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#define SCU_SAS_RECPHYCAP_READ(phy) \
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scu_link_layer_register_read(phy, receive_phycap)
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/// This macro reads the link layer control register
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#define SCU_SAS_LLCTL_READ(phy) \
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scu_link_layer_register_read(phy, link_layer_control);
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/// This macro writes the link layer control register
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#define SCU_SAS_LLCTL_WRITE(phy, value) \
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scu_link_layer_register_write(phy, link_layer_control, value);
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/// This macro reads the link layer status register
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#define SCU_SAS_LLSTA_READ(phy) \
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scu_link_layer_register_read(phy, link_layer_status);
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#define SCU_SAS_ECENCR_READ(phy) \
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scu_link_layer_register_read(phy, error_counter_event_notification_control)
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#define SCU_SAS_ECENCR_WRITE(phy, value) \
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scu_link_layer_register_write(phy, error_counter_event_notification_control, value)
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#ifdef __cplusplus
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}
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#endif // __cplusplus
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#endif // _SCIC_SDS_PHY_REGISTERS_H_
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