John Baldwin 92597e064b On some Intel CPUs with a P-state but not C-state invariant TSC the TSC ... may also halt in C2 and not just C3 (it seems that in some cases the BIOS advertises its C3 state as a C2 state in _CST). Just play it safe and disable both C2 and C3 states if a user forces the use of the TSC as the timecounter on such CPUs. PR: 192316 Differential Revision: https://reviews.freebsd.org/D1441 No objection from: jkim MFC after: 1 week		2015-01-05 20:44:44 +00:00
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acpica	MFamd64: Add support for extended FPU states on i386. This includes	2014-11-02 22:58:30 +00:00
bios	Add missing header needed by free(9).	2012-09-30 15:42:20 +00:00
cpufreq	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
include	Improve support for XSAVE with debuggers.	2014-11-21 20:53:17 +00:00
iommu	Follow up to r225617. In order to maximize the re-usability of kernel code	2014-10-16 18:04:43 +00:00
isa	Virtual machines can easily have more than 16 option ROMs and	2014-10-22 01:37:32 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
x86	On some Intel CPUs with a P-state but not C-state invariant TSC the TSC	2015-01-05 20:44:44 +00:00
xen	Fix warning about possible use of uninitialized variable.	2015-01-02 08:42:44 +00:00