54873b4cd6
The external gpio pins are connected to a PLD on the i2c bus, unfortunatley this device does not conform by failing to send an ack after each byte written. The iicbb driver will abort the transfer when the address is not ack'd and it would introduce a lot of churn to be able to pass a flag down to iicbb_start/iicbb_write. Instead we do bad things by grabbing the iicbus but then doing our own bit banging.
11 lines
463 B
Plaintext
11 lines
463 B
Plaintext
#$FreeBSD$
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arm/xscale/ixp425/avila_machdep.c standard
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arm/xscale/ixp425/avila_ata.c optional avila_ata
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arm/xscale/ixp425/avila_led.c optional avila_led
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arm/xscale/ixp425/avila_gpio.c optional avila_gpio
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arm/xscale/ixp425/cambria_exp_space.c standard
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arm/xscale/ixp425/cambria_fled.c optional cambria_fled
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arm/xscale/ixp425/cambria_led.c optional cambria_led
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arm/xscale/ixp425/cambria_gpio.c optional cambria_gpio
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arm/xscale/ixp425/ixdp425_pci.c optional pci
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