freebsd-dev/sys/riscv/include
Mitchell Horne f7d2df2a8a Handle load from loader(8)
In locore, we must detect and handle different arguments passed by
loader(8) compared to what we recieve when booting directly via SBI
firmware. Currently we receive the hart ID in a0 and a pointer to the
device tree blob in a1. loader(8) provides only a pointer to its
metadata in a0.

The solution to this is to add an additional entry point, _alt_start.
This will be placed first in the .text section, so SBI firmware will
enter here, and jump to the common pagetable setup shortly after. Since
loader(8) understands our ELF kernel, it will enter at the ELF's entry
address, which points to _start. This approach leads to very little
guesswork as to which way we booted.

Fix-up initriscv() to parse the loader's metadata, continuing to use
fake_preload_metadata() in the SBI direct boot case.

Reviewed by:	markj, jrtc27 (asm portion)
Differential Revision:	https://reviews.freebsd.org/D24912
2020-06-24 15:20:00 +00:00
..
_align.h
_bus.h Regularize my copyright notice 2019-12-04 16:56:11 +00:00
_inttypes.h
_limits.h
_stdint.h
_types.h
asm.h Fix global pointer relaxations in the RISC-V kernel 2019-06-09 15:43:38 +00:00
atomic.h Fix atomic_*cmpset32 on riscv64 with clang. 2019-10-23 16:41:31 +00:00
bus_dma_impl.h Provide a template for busdma code for RISC-V. 2019-05-07 13:41:43 +00:00
bus_dma.h Provide a template for busdma code for RISC-V. 2019-05-07 13:41:43 +00:00
bus.h
clock.h
counter.h Centralize __pcpu definitions. 2019-08-29 07:25:27 +00:00
cpu.h
cpufunc.h Provide a template for busdma code for RISC-V. 2019-05-07 13:41:43 +00:00
db_machdep.h Read the breakpoint instruction to determine its length in BKPT_SKIP. 2020-02-05 20:06:35 +00:00
dump.h
efi.h
elf.h RISC-V: expose extension bits in AT_HWCAP 2019-06-11 00:55:54 +00:00
encoding.h
endian.h
exec.h
float.h
floatingpoint.h
fpe.h
frame.h
ieeefp.h
in_cksum.h
intr.h
kdb.h
machdep.h Handle load from loader(8) 2020-06-24 15:20:00 +00:00
md_var.h Add missing files from r354720 2019-11-15 03:37:49 +00:00
memdev.h
metadata.h RISC-V: copy the DTB to early KVA 2020-04-06 22:48:43 +00:00
minidump.h
ofw_machdep.h
param.h Improve MACHINE_ARCH handling for hard vs soft-float on RISC-V. 2020-04-27 17:55:40 +00:00
pcb.h Remove unused fields from struct pcb. 2020-01-30 19:15:27 +00:00
pcpu_aux.h Centralize __pcpu definitions. 2019-08-29 07:25:27 +00:00
pcpu.h Store offset into zpcpu allocations in the per-cpu area. 2020-02-12 11:11:22 +00:00
pmap.h Introduce vm_page_astate. 2019-12-10 18:14:50 +00:00
pmc_mdep.h
proc.h
procctl.h amd64 KPTI: add control from procctl(2). 2019-03-16 11:44:33 +00:00
profile.h
psl.h
pte.h Implement transparent 2MB superpage promotion for RISC-V. 2019-02-13 17:19:37 +00:00
ptrace.h
reg.h
reloc.h
resource.h Enable NEW_PCIB on riscv. 2020-01-24 16:50:51 +00:00
riscvreg.h Fix EXCP_MASK to include all relevant bits from scause. 2020-02-05 20:34:22 +00:00
runq.h
sbi.h Add support for HSM SBI extension 2020-05-01 21:55:51 +00:00
setjmp.h
sf_buf.h
sigframe.h Follow arm[32] and sparc64 KAPI and provide the FreeBSD standard spelling 2019-01-29 20:10:27 +00:00
signal.h
smp.h
stack.h
stdarg.h
sysarch.h
trap.h
ucontext.h
vdso.h
vm.h
vmparam.h Add macros simplifying the fake preload setup 2020-05-28 14:56:11 +00:00