Conrad Meyer d0c7cde53e vmm(4): Mask Spectre feature bits on AMD hosts ... For parity with Intel hosts, which already mask out the CPUID feature bits that indicate the presence of the SPEC_CTRL MSR, do the same on AMD. Eventually we may want to have a better support story for guests, but for now, limit the damage of incorrectly indicating an MSR we do not yet support. Eventually, we may want a generic CPUID override system for administrators, or for minimum supported feature set in heterogenous environments with failover. That is a much larger scope effort than this bug fix. PR: 235010 Reported by: Rys Sommefeldt <rys AT sommefeldt.com> Sponsored by: Dell EMC Isilon		2019-01-18 23:54:51 +00:00
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amd	Merge cases with upper block.	2018-10-31 01:27:44 +00:00
intel	Trim whitespace at EoL, use tabs instead of spaces for indent.	2019-01-17 05:15:25 +00:00
io	Add SPDX tags to vmm(4).	2018-06-13 07:02:58 +00:00
vmm_dev.c	- Add the ability to run bhyve(8) within a jail(8).	2018-08-01 00:39:21 +00:00
vmm_host.c
vmm_host.h
vmm_instruction_emul.c	bhyve: emulate CLFLUSH and CLFLUSHOPT.	2018-10-12 15:30:15 +00:00
vmm_ioport.c	Add SPDX tags to vmm(4).	2018-06-13 07:02:58 +00:00
vmm_ioport.h	Add SPDX tags to vmm(4).	2018-06-13 07:02:58 +00:00
vmm_ktr.h
vmm_lapic.c
vmm_lapic.h
vmm_mem.c
vmm_mem.h
vmm_stat.c
vmm_stat.h
vmm_util.c
vmm_util.h
vmm.c	Handle a guest executing a vm instruction by trapping and raising an	2018-09-27 11:16:19 +00:00
x86.c	vmm(4): Mask Spectre feature bits on AMD hosts	2019-01-18 23:54:51 +00:00
x86.h	vmm(4): Take steps towards multicore bhyve AMD support	2019-01-16 02:19:04 +00:00