57462c010c
Work through the various power commands and convert them from a "is this a foo controller or a foo' controller or a foo''' controller" to a cabability based scheme. We have bits in the softc that tell us what kind of power control scheme the controller uses, rather than relying on being able to enumerate them all. Cardbus bridges are numerous, but nearly all implement the i82365sl-DF scheme (well, a few implement cirrus CL-PD67xx, but those were made by Cirrus Logic!). Add a pointer back to the softc in each pcic_slot so we can access these flags. Add comments that talk about the issues here. Also note in passing that there are two differ Vpp schemes in use and that we may need to adjust the code to deal with both of them. Note why it usually works now. We have 5 power management modes right now: KING, AB, DF, PD and VG. AB is for the i82365 stpes A, B and C. DF is for step DF. PD is the cirrus logic extensions for 3.3V while VG is the VADEM extensions for 3.3V. KING is for the IBM KING controller found on some old cards. # I'm looking for one of those old cards or a laptop that has the KING # bridge in it. We have to still cheat and treat the AB parts like the DF parts because pci isn't here yet. As far as I can tell, this is harmless for actual old parts and necessary to work with 3.3V cards in some laptops. This almost eliminates all tests for controller in the code. There are still a few unrelated to power that need taming as well.
87 lines
3.6 KiB
C
87 lines
3.6 KiB
C
/*
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* Copyright (c) 2001 M. Warner Losh. All Rights Reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Per-slot data table.
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*/
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struct pcic_slot {
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int index; /* Index register */
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int data; /* Data register */
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int offset; /* Offset value for index */
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char controller; /* Device type */
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char revision; /* Device Revision */
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struct slot *slt; /* Back ptr to slot */
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struct pcic_softc *sc; /* Back pointer to softc */
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u_char (*getb)(struct pcic_slot *, int);
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void (*putb)(struct pcic_slot *, int, u_char);
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u_char *regs; /* Pointer to regs in mem */
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};
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struct pcic_softc
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{
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u_int32_t slotmask; /* Mask of valid slots */
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u_int32_t flags; /* Interesting flags */
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#define PCIC_IO_MAPPED 0x00000001 /* ExCA registers are io mapped */
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#define PCIC_MEM_MAPPED 0x00000002 /* ExCA registers mem mapped */
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#define PCIC_VG_POWER 0x00000004 /* Uses VG power regs */
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#define PCIC_DF_POWER 0x00000008 /* Uses DF step regs */
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#define PCIC_PD_POWER 0x00000010 /* Uses CL-PD regs */
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#define PCIC_KING_POWER 0x00000020 /* Uses IBM KING regs */
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#define PCIC_AB_POWER 0x00000040 /* Use old A/B step power */
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int iorid; /* Rid of I/O region */
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struct resource *iores; /* resource for I/O region */
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int memrid;
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struct resource *memres;
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int irqrid;
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struct resource *irqres;
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void *ih;
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int unit;
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struct callout_handle timeout_ch;
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struct pcic_slot slots[PCIC_MAX_SLOTS];
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};
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extern devclass_t pcic_devclass;
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int pcic_attach(device_t dev);
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int pcic_activate_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r);
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int pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r);
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int pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
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int flags, driver_intr_t *intr, void *arg, void **cookiep);
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int pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
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void *cookie);
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int pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
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u_long value);
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int pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
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u_long *value);
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int pcic_get_memory_offset(device_t bus, device_t child, int rid,
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u_int32_t *offset);
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int pcic_set_memory_offset(device_t bus, device_t child, int rid,
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u_int32_t offset, u_int32_t *deltap);
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void pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask);
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void pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask);
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