6a11fa4e31
This is based on the patch sent by Alexander Fedorov with the following fixes/improvements: - Better error handling; - Clock is derived from PLL6 (obtained from netbsd); - No more unnecessary busy loops on interrupt handler; - style(9) fixes and code cleanup. I also want to thanks Martin Galvan who has sent an alternative implementation with some interesting fixes. Tested on CubieBoard2, Banana-Pi (thanks to netgate!) and Cubieboard1 (Pratik Singhal). This is intended to pave the way for the upcoming GSoC work (and make easier the build of images for the supported boards). PR: 196081 Submitted by: Alexander Fedorov <alexander.fedorov@rtlservice.com>
147 lines
4.7 KiB
C
147 lines
4.7 KiB
C
/*-
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* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _A10_CLK_H_
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#define _A10_CLK_H_
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#define CCMU_BASE 0xe1c20000
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#define CCM_PLL1_CFG 0x0000
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#define CCM_PLL1_TUN 0x0004
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#define CCM_PLL2_CFG 0x0008
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#define CCM_PLL2_TUN 0x000c
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#define CCM_PLL3_CFG 0x0010
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#define CCM_PLL3_TUN 0x0014
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#define CCM_PLL4_CFG 0x0018
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#define CCM_PLL4_TUN 0x001c
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#define CCM_PLL5_CFG 0x0020
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#define CCM_PLL5_TUN 0x0024
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#define CCM_PLL6_CFG 0x0028
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#define CCM_PLL6_TUN 0x002c
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#define CCM_PLL7_CFG 0x0030
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#define CCM_PLL7_TUN 0x0034
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#define CCM_PLL1_TUN2 0x0038
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#define CCM_PLL5_TUN2 0x003c
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#define CCM_PLL_LOCK_DBG 0x004c
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#define CCM_OSC24M_CFG 0x0050
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#define CCM_CPU_AHB_APB0_CFG 0x0054
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#define CCM_APB1_CLK_DIV 0x0058
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#define CCM_AXI_GATING 0x005c
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#define CCM_AHB_GATING0 0x0060
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#define CCM_AHB_GATING1 0x0064
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#define CCM_APB0_GATING 0x0068
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#define CCM_APB1_GATING 0x006c
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#define CCM_NAND_SCLK_CFG 0x0080
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#define CCM_MS_SCLK_CFG 0x0084
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#define CCM_MMC0_SCLK_CFG 0x0088
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#define CCM_MMC1_SCLK_CFG 0x008c
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#define CCM_MMC2_SCLK_CFG 0x0090
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#define CCM_MMC3_SCLK_CFG 0x0094
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#define CCM_TS_CLK 0x0098
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#define CCM_SS_CLK 0x009c
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#define CCM_SPI0_CLK 0x00a0
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#define CCM_SPI1_CLK 0x00a4
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#define CCM_SPI2_CLK 0x00a8
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#define CCM_PATA_CLK 0x00ac
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#define CCM_IR0_CLK 0x00b0
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#define CCM_IR1_CLK 0x00b4
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#define CCM_IIS_CLK 0x00b8
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#define CCM_AC97_CLK 0x00bc
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#define CCM_SPDIF_CLK 0x00c0
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#define CCM_KEYPAD_CLK 0x00c4
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#define CCM_SATA_CLK 0x00c8
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#define CCM_USB_CLK 0x00cc
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#define CCM_GPS_CLK 0x00d0
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#define CCM_SPI3_CLK 0x00d4
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#define CCM_DRAM_CLK 0x0100
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#define CCM_BE0_SCLK 0x0104
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#define CCM_BE1_SCLK 0x0108
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#define CCM_FE0_CLK 0x010c
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#define CCM_FE1_CLK 0x0110
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#define CCM_MP_CLK 0x0114
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#define CCM_LCD0_CH0_CLK 0x0118
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#define CCM_LCD1_CH0_CLK 0x011c
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#define CCM_CSI_ISP_CLK 0x0120
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#define CCM_TVD_CLK 0x0128
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#define CCM_LCD0_CH1_CLK 0x012c
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#define CCM_LCD1_CH1_CLK 0x0130
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#define CCM_CS0_CLK 0x0134
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#define CCM_CS1_CLK 0x0138
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#define CCM_VE_CLK 0x013c
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#define CCM_AUDIO_CODEC_CLK 0x0140
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#define CCM_AVS_CLK 0x0144
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#define CCM_ACE_CLK 0x0148
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#define CCM_LVDS_CLK 0x014c
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#define CCM_HDMI_CLK 0x0150
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#define CCM_MALI400_CLK 0x0154
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#define CCM_AHB_GATING_USB0 (1 << 0)
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#define CCM_AHB_GATING_EHCI0 (1 << 1)
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#define CCM_AHB_GATING_EHCI1 (1 << 3)
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#define CCM_AHB_GATING_SDMMC0 (1 << 8)
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#define CCM_AHB_GATING_EMAC (1 << 17)
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#define CCM_USB_PHY (1 << 8)
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#define CCM_USB0_RESET (1 << 0)
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#define CCM_USB1_RESET (1 << 1)
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#define CCM_USB2_RESET (1 << 2)
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#define CCM_PLL_CFG_ENABLE (1U << 31)
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#define CCM_PLL_CFG_BYPASS (1U << 30)
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#define CCM_PLL_CFG_PLL5 (1U << 25)
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#define CCM_PLL_CFG_PLL6 (1U << 24)
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#define CCM_PLL_CFG_FACTOR_N 0x1f00
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#define CCM_PLL_CFG_FACTOR_N_SHIFT 8
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#define CCM_PLL_CFG_FACTOR_K 0x30
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#define CCM_PLL_CFG_FACTOR_K_SHIFT 4
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#define CCM_PLL_CFG_FACTOR_M 0x3
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#define CCM_PLL6_CFG_SATA_CLKEN (1U << 14)
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#define CCM_SD_CLK_SRC_SEL 0x3000000
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#define CCM_SD_CLK_SRC_SEL_SHIFT 24
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#define CCM_SD_CLK_SRC_SEL_OSC24M 0
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#define CCM_SD_CLK_SRC_SEL_PLL6 1
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#define CCM_SD_CLK_PHASE_CTR 0x700000
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#define CCM_SD_CLK_PHASE_CTR_SHIFT 20
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#define CCM_SD_CLK_DIV_RATIO_N 0x30000
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#define CCM_SD_CLK_DIV_RATIO_N_SHIFT 16
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#define CCM_SD_CLK_OPHASE_CTR 0x700
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#define CCM_SD_CLK_OPHASE_CTR_SHIFT 8
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#define CCM_SD_CLK_DIV_RATIO_M 0xf
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#define CCM_CLK_REF_FREQ 24000000U
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int a10_clk_usb_activate(void);
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int a10_clk_usb_deactivate(void);
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int a10_clk_emac_activate(void);
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int a10_clk_mmc_activate(int);
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int a10_clk_mmc_cfg(int, int);
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#endif /* _A10_CLK_H_ */
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