f26c810514
than one unit with four busses attached to it. This allows us to use existing fdt data which describes separate devices with separate resources. It also allows any combination of the units to be en/disabled in the board dts files. Adjust our dts code to match what's used by linux and u-boot now that we're structured to do so. Document lots of interesting stuff learned whiling doing this with a big comment block in the driver, so I don't have to re-learn it for the next round of changes.
703 lines
17 KiB
Plaintext
703 lines
17 KiB
Plaintext
/*
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* Copyright (c) 2012 The FreeBSD Foundation
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* Copyright (c) 2013 Rui Paulo
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* All rights reserved.
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*
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* This software was developed by Semihalf under sponsorship from
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* the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Freescale i.MX535 Device Tree Source.
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*
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* $FreeBSD$
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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soc = &SOC;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "ARM,MCIMX535";
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <0x8000>;
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i-cache-size = <0x8000>;
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l2-cache-line-size = <32>;
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l2-cache-line = <0x40000>;
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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localbus@0fffc000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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/* This reflects CPU decode windows setup. */
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ranges;
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tzic: tz-interrupt-controller@0fffc000 {
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compatible = "fsl,imx53-tzic", "fsl,tzic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x0fffc000 0x00004000>;
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};
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/*
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* 40000000 40000FFF 4K Debug ROM
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* 40001000 40001FFF 4K ETB
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* 40002000 40002FFF 4K ETM
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* 40003000 40003FFF 4K TPIU
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* 40004000 40004FFF 4K CTI0
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* 40005000 40005FFF 4K CTI1
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* 40006000 40006FFF 4K CTI2
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* 40007000 40007FFF 4K CTI3
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* 40008000 40008FFF 4K ARM Debug Unit
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*
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* 0FFFC000 0FFFCFFF 0x4000 TZIC
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*/
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};
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SOC: soc@50000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&tzic>;
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ranges = <0x50000000 0x14000000>;
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aips@50000000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&tzic>;
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ranges;
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/* Required by many devices, so better to stay first */
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/* 53FD4000 0x4000 CCM */
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clock@53fd4000 {
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compatible = "fsl,imx53-ccm";
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/* 63F80000 0x4000 DPLLIP1 */
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/* 63F84000 0x4000 DPLLIP2 */
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/* 63F88000 0x4000 DPLLIP3 */
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reg = <0x53fd4000 0x4000
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0x63F80000 0x4000
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0x63F84000 0x4000
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0x63F88000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <71 72>;
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status = "disabled";
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};
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/*
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* GPIO modules moved up - to have it attached for
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* drivers which rely on GPIO
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*/
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/* 53F84000 0x4000 GPIO1 */
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gpio1: gpio@53f84000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53f84000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <50 51 42 43 44 45 46 47 48 49>;
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/* TODO: use <> also */
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/* 53F88000 0x4000 GPIO2 */
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gpio2: gpio@53f88000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53f88000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <52 53>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/* 53F8C000 0x4000 GPIO3 */
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gpio3: gpio@53f8c000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53f8c000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <54 55>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/* 53F90000 0x4000 GPIO4 */
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gpio4: gpio@53f90000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53f90000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <56 57>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/* 53FDC000 0x4000 GPIO5 */
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gpio5: gpio@53fdc000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53fdc000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <103 104>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/* 53FE0000 0x4000 GPIO6 */
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gpio6: gpio@53fe0000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53fe0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <105 106>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/* 53FE4000 0x4000 GPIO5 */
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gpio7: gpio@53fe4000 {
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compatible = "fsl,imx53-gpio";
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reg = <0x53fe4000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <107 108>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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spba@50000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&tzic>;
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ranges;
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/* 50004000 0x4000 ESDHC 1 */
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esdhc@50004000 {
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compatible = "fsl,imx53-esdhc";
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reg = <0x50004000 0x4000>;
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interrupt-parent = <&tzic>; interrupts = <1>;
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status = "disabled";
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};
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/* 50008000 0x4000 ESDHC 2 */
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esdhc@50008000 {
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compatible = "fsl,imx53-esdhc";
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reg = <0x50008000 0x4000>;
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interrupt-parent = <&tzic>; interrupts = <2>;
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status = "disabled";
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};
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/* 5000C000 0x4000 UART 3 */
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uart3: serial@5000c000 {
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compatible = "fsl,imx53-uart", "fsl,imx-uart";
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reg = <0x5000c000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <33>;
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status = "disabled";
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};
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/* 50010000 0x4000 eCSPI1 */
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ecspi@50010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx53-ecspi";
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reg = <0x50010000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <36>;
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status = "disabled";
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};
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/* 50014000 0x4000 SSI2 irq30 */
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SSI2: ssi@50014000 {
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compatible = "fsl,imx53-ssi";
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reg = <0x50014000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <30>;
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status = "disabled";
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};
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/* 50020000 0x4000 ESDHC 3 */
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esdhc@50020000 {
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compatible = "fsl,imx53-esdhc";
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reg = <0x50020000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <3>;
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status = "disabled";
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};
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/* 50024000 0x4000 ESDHC 4 */
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esdhc@50024000 {
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compatible = "fsl,imx53-esdhc";
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reg = <0x50024000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <4>;
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status = "disabled";
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};
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/* 50028000 0x4000 SPDIF */
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/* 91 SPDIF */
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/* 50030000 0x4000 PATA (PORT UDMA) irq70 */
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/* 50034000 0x4000 SLM */
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/* 50038000 0x4000 HSI2C */
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/* 64 HS-I2C */
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/* 5003C000 0x4000 SPBA */
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};
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usbphy0: usbphy@0 {
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compatible = "usb-nop-xceiv";
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status = "okay";
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};
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usbphy1: usbphy@1 {
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compatible = "usb-nop-xceiv";
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status = "okay";
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};
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usbotg: usb@53f80000 {
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compatible = "fsl,imx53-usb", "fsl,imx27-usb";
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reg = <0x53f80000 0x0200>;
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interrupts = <18>;
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fsl,usbphy = <&usbphy0>;
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status = "disabled";
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};
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usbh1: usb@53f80200 {
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compatible = "fsl,imx53-usb", "fsl,imx27-usb";
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reg = <0x53f80200 0x0200>;
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interrupts = <14>;
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fsl,usbphy = <&usbphy1>;
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status = "disabled";
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};
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usbh2: usb@53f80400 {
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compatible = "fsl,imx53-usb", "fsl,imx27-usb";
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reg = <0x53f80400 0x0200>;
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interrupts = <16>;
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status = "disabled";
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};
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usbh3: usb@53f80600 {
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compatible = "fsl,imx53-usb", "fsl,imx27-usb";
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reg = <0x53f80600 0x0200>;
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interrupts = <17>;
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status = "disabled";
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};
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usbmisc: usbmisc@53f80800 {
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#index-cells = <1>;
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compatible = "fsl,imx53-usbmisc";
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reg = <0x53f80800 0x200>;
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};
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/* 53F98000 0x4000 WDOG1 */
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wdog@53f98000 {
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compatible = "fsl,imx53-wdt";
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reg = <0x53f98000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <58>;
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status = "disabled";
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};
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/* 53F9C000 0x4000 WDOG2 (TZ) */
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wdog@53f9c000 {
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compatible = "fsl,imx53-wdt";
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reg = <0x53f9c000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <59>;
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status = "disabled";
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};
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/* 53F94000 0x4000 KPP */
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keyboard@53f94000 {
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compatible = "fsl,imx53-kpp";
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reg = <0x53f94000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <60>;
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status = "disabled";
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};
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/* 53FA0000 0x4000 GPT */
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timer@53fa0000 {
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compatible = "fsl,imx53-gpt";
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reg = <0x53fa0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <39>;
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status = "disabled";
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};
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/* 53FA4000 0x4000 SRTC */
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rtc@53fa4000 {
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compatible = "fsl,imx53-srtc";
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reg = <0x53fa4000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <24 25>;
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status = "disabled";
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};
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/* 53FA8000 0x4000 IOMUXC */
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iomux@53fa8000 {
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compatible = "fsl,imx53-iomux";
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reg = <0x53fa8000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <7>;
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};
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/* 53FAC000 0x4000 EPIT1 */
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epit1: timer@53fac000 {
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compatible = "fsl,imx53-epit";
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reg = <0x53fac000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <40>;
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status = "disabled";
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};
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/* 53FB0000 0x4000 EPIT2 */
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epit2: timer@53fb0000 {
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compatible = "fsl,imx53-epit";
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reg = <0x53fb0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <41>;
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status = "disabled";
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};
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/* 53FB4000 0x4000 PWM1 */
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pwm@53fb4000 {
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compatible = "fsl,imx53-pwm";
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reg = <0x53fb4000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <61>;
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status = "disabled";
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};
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/* 53FB8000 0x4000 PWM2 */
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pwm@53fb8000 {
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compatible = "fsl,imx53-pwm";
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reg = <0x53fb8000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <94>;
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status = "disabled";
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};
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/* 53FBC000 0x4000 UART 1 */
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uart1: serial@53fbc000 {
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compatible = "fsl,imx53-uart", "fsl,imx-uart";
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reg = <0x53fbc000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <31>;
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status = "disabled";
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};
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/* 53FC0000 0x4000 UART 2 */
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uart2: serial@53fc0000 {
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compatible = "fsl,imx53-uart", "fsl,imx-uart";
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reg = <0x53fc0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <32>;
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status = "disabled";
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};
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/* 53FC0000 0x4000 UART 4 */
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uart4: serial@53ff0000 {
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compatible = "fsl,imx53-uart", "fsl,imx-uart";
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reg = <0x53ff0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <13>;
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status = "disabled";
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};
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/* 53FD0000 0x4000 SRC */
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reset@53fd0000 {
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compatible = "fsl,imx53-src";
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reg = <0x53fd0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <75>;
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status = "disabled";
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};
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/* 53FD8000 0x4000 GPC */
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power@53fd8000 {
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compatible = "fsl,imx53-gpc";
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reg = <0x53fd8000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <73 74>;
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status = "disabled";
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};
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/* 53FE8000 0x4000 PATA (PORT PIO) */
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/* 70 PATA Parallel ATA host controller interrupt */
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ide@53fe8000 {
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compatible = "fsl,imx53-ata";
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reg = <0x83fe0000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <70>;
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status = "disabled";
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};
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};
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aips@60000000 { /* AIPS2 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&tzic>;
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ranges;
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/* 53FC0000 0x4000 UART 5 */
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uart5: serial@63f90000 {
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compatible = "fsl,imx53-uart", "fsl,imx-uart";
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reg = <0x63f90000 0x4000>;
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interrupt-parent = <&tzic>;
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interrupts = <32>;
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status = "disabled";
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};
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/* 63F94000 0x4000 AHBMAX */
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/* 63F98000 0x4000 IIM */
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/*
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* 69 IIM Interrupt request to the processor.
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* Indicates to the processor that program or
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* explicit.
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*/
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/* 63F9C000 0x4000 CSU */
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/*
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* 27 CSU Interrupt Request 1. Indicates to the
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* processor that one or more alarm inputs were.
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*/
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/* 63FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */
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/* irq76 Neon Monitor Interrupt */
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/* irq77 Performance Unit Interrupt */
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/* irq78 CTI IRQ */
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/* irq79 Debug Interrupt, Cross-Trigger Interface 1 */
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/* irq80 Debug Interrupt, Cross-Trigger Interface 1 */
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/* irq89 Debug Interrupt, Cross-Trigger Interface 2 */
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/* irq98 Debug Interrupt, Cross-Trigger Interface 3 */
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/* 63FA4000 0x4000 OWIRE irq88 */
|
|
/* 63FA8000 0x4000 FIRI irq93 */
|
|
/* 63FAC000 0x4000 eCSPI2 */
|
|
ecspi@63fac000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx53-ecspi";
|
|
reg = <0x63fac000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <37>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FB0000 0x4000 SDMA */
|
|
sdma@63fb0000 {
|
|
compatible = "fsl,imx53-sdma";
|
|
reg = <0x63fb0000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <6>;
|
|
};
|
|
|
|
/* 63FB4000 0x4000 SCC */
|
|
/* 21 SCC Security Monitor High Priority Interrupt. */
|
|
/* 22 SCC Secure (TrustZone) Interrupt. */
|
|
/* 23 SCC Regular (Non-Secure) Interrupt. */
|
|
|
|
/* 63FB8000 0x4000 ROMCP */
|
|
/* 63FBC000 0x4000 RTIC */
|
|
/*
|
|
* 26 RTIC RTIC (Trust Zone) Interrupt Request.
|
|
* Indicates that the RTIC has completed hashing the
|
|
*/
|
|
|
|
/* 63FC0000 0x4000 CSPI */
|
|
cspi@63fc0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx53-cspi";
|
|
reg = <0x63fc0000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <38>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FC4000 0x4000 I2C2 */
|
|
i2c@63fc4000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c";
|
|
reg = <0x63fc4000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <63>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FC8000 0x4000 I2C1 */
|
|
i2c@63fc8000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c";
|
|
reg = <0x63fc8000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <62>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FCC000 0x4000 SSI1 */
|
|
/* 29 SSI1 SSI-1 Interrupt Request */
|
|
SSI1: ssi@63fcc000 {
|
|
compatible = "fsl,imx53-ssi";
|
|
reg = <0x63fcc000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <29>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FD0000 0x4000 AUDMUX */
|
|
audmux@63fd4000 {
|
|
compatible = "fsl,imx53-audmux";
|
|
reg = <0x63fd4000 0x4000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FD8000 0x4000 EXTMC */
|
|
/* 8 EXTMC (NFC) */
|
|
/* 15 EXTMC */
|
|
/* 97 EXTMC Boot sequence completed interrupt */
|
|
/*
|
|
* 101 EMI Indicates all pages have been transferred
|
|
* to NFC during an auto program operation.
|
|
*/
|
|
|
|
/* 83FE4000 0x4000 SIM */
|
|
/* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */
|
|
/* 68 SIM intr composed of tc, etc, tfe, and rdrf */
|
|
|
|
/* 63FD_C000 0x4000 apb2ip_pl301_2x2 */
|
|
/* 63FE_0000 0x4000 apb2ip_pl301_4x1 */
|
|
/* 63FE4000 0x4000 MLB */
|
|
/* 63FE8000 0x4000 SSI3 */
|
|
/* 96 SSI3 SSI-3 Interrupt Request */
|
|
SSI3: ssi@63fe8000 {
|
|
compatible = "fsl,imx51-ssi";
|
|
reg = <0x63fe8000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <96>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FEC000 0x4000 FEC */
|
|
ethernet@63fec000 {
|
|
compatible = "fsl,imx53-fec";
|
|
reg = <0x63fec000 0x4000>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <87>;
|
|
status = "disabled";
|
|
};
|
|
|
|
/* 63FF0000 0x4000 TVE */
|
|
/* 92 TVE */
|
|
/* 63FF4000 0x4000 VPU */
|
|
/* 9 VPU */
|
|
/* 100 VPU Idle interrupt from VPU */
|
|
|
|
/* 63FF8000 0x4000 SAHARA */
|
|
/* 19 SAHARA SAHARA host 0 (TrustZone) Intr */
|
|
/* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr */
|
|
};
|
|
};
|
|
|
|
localbus@18000000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
ranges;
|
|
|
|
vga: ipu3@18000000 {
|
|
compatible = "fsl,ipu3";
|
|
reg = <
|
|
0x18000000 0x08000 /* CM */
|
|
0x18008000 0x08000 /* IDMAC */
|
|
0x18018000 0x08000 /* DP */
|
|
0x18020000 0x08000 /* IC */
|
|
0x18028000 0x08000 /* IRT */
|
|
0x18030000 0x08000 /* CSI0 */
|
|
0x18038000 0x08000 /* CSI1 */
|
|
0x18040000 0x08000 /* DI0 */
|
|
0x18048000 0x08000 /* DI1 */
|
|
0x18050000 0x08000 /* SMFC */
|
|
0x18058000 0x08000 /* DC */
|
|
0x18060000 0x08000 /* DMFC */
|
|
0x18068000 0x08000 /* VDI */
|
|
0x19000000 0x20000 /* CPMEM */
|
|
0x19020000 0x20000 /* LUT */
|
|
0x19040000 0x20000 /* SRM */
|
|
0x19060000 0x20000 /* TPM */
|
|
0x19080000 0x20000 /* DCTMPL */
|
|
>;
|
|
interrupt-parent = <&tzic>;
|
|
interrupts = <
|
|
10 /* IPUEX Error */
|
|
11 /* IPUEX Sync */
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
/*
|
|
|
|
TODO: Not mapped interrupts
|
|
|
|
5 DAP
|
|
84 GPU2D (OpenVG) general interrupt
|
|
85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility)
|
|
12 GPU3D
|
|
102 GPU3D Idle interrupt from GPU3D (for S/W power gating)
|
|
90 SJC
|
|
*/
|