087d31736a
The driver attempts to support all documented parts, but has only been tested with the 512Mbit part on the Terasic DE4 FPGA board. It should be trivial to adapt the driver's attach routine to other embedded boards using with any parts in the family. Also import isfctl(8) which can be used to erase sections of the flash. Sponsored by: DARPA, AFRL
121 lines
3.5 KiB
C
121 lines
3.5 KiB
C
/*-
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* Copyright (c) 2012 Robert N. M. Watson
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* Copyright (c) 2012 SRI International
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/condvar.h>
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#include <sys/conf.h>
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#include <sys/bio.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <sys/systm.h>
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#include <sys/taskqueue.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <geom/geom_disk.h>
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#include <dev/isf/isf.h>
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/*
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* Nexus bus attachment for the Intel Strata Flash devices. Appropriate for
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* most Altera FPGA SoC-style configurations in which the part will be exposed
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* to the processor via a memory-mapped Avalon bus.
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*/
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static int
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isf_nexus_probe(device_t dev)
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{
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device_set_desc(dev, "Intel StrataFlash NOR flash device");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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isf_nexus_attach(device_t dev)
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{
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int error;
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struct isf_softc *sc;
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sc = device_get_softc(dev);
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sc->isf_dev = dev;
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sc->isf_unit = device_get_unit(dev);
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sc->isf_rid = 0;
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sc->isf_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->isf_rid, RF_ACTIVE);
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if (sc->isf_res == NULL) {
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device_printf(dev, "couldn't map memory\n");
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return (ENXIO);
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}
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error = isf_attach(sc);
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if (error)
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bus_release_resource(dev, SYS_RES_MEMORY, sc->isf_rid,
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sc->isf_res);
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return (error);
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}
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static int
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isf_nexus_detach(device_t dev)
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{
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struct isf_softc *sc;
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sc = device_get_softc(dev);
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KASSERT(sc->isf_res != NULL, ("%s: resources not allocated",
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__func__));
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isf_detach(sc);
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bus_release_resource(dev, SYS_RES_MEMORY, sc->isf_rid, sc->isf_res);
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return (0);
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}
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static device_method_t isf_nexus_methods[] = {
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DEVMETHOD(device_probe, isf_nexus_probe),
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DEVMETHOD(device_attach, isf_nexus_attach),
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DEVMETHOD(device_detach, isf_nexus_detach),
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{ 0, 0 }
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};
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static driver_t isf_nexus_driver = {
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"isf",
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isf_nexus_methods,
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sizeof(struct isf_softc),
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};
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static devclass_t isf_devclass;
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DRIVER_MODULE(isf, nexus, isf_nexus_driver, isf_devclass, 0, 0);
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