58fb7d8e0b
ahc_pci.c:
Prepare for making ahc a module by adding module dependency
and version info.
aic7770.c:
Remove linux header ifdefs. The headers are handled differently
in Linux where local includes (those using "'s instead of <>'s)
are allowed.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
aic7xxx.c:
Remove linux header ifdefs.
current->curr to avoid Linux's use of current as a
#define for the current task on some architectures.
Add a helper function, ahc_assert_atn(), for use in
message phases we handle manually. This hides the fact
that U160 chips with the expected phase matching disabled
need to have SCSISIGO updated differently.
if (ahc_check_residual(scb) != 0)
ahc_calc_residual(scb);
else
ahc_set_residual(scb, 0);
becomes:
ahc_update_residual(scb);
Modify scsi parity error (or CRC error) handling to
reflect expected phase being disabled on U160 chips.
Move SELTO handling above BUSFREE handling so we can
use the new busfree interrupt behavior on U160 chips.
In ahc_build_transfer_msg() filter the period and ppr_options
prior to deciding whether a PPR message is required.
ppr_options may be forced to zero which will effect our
decision.
Correct a long standing but latent bug in ahc_find_syncrate().
We could choose a DT only rate even though DT transfers were
disabled. In the CAM environment this was unlikely as CAM
filters our rate to a non-DT value if the device does not
support such rates.
When displaing controller characteristics, include the
speed of the chip. This way we can modify the transfer
speed based on optional features that are enabled/disabled
in a particular application.
Add support for switching from fully blown tagged queing
to just using simple queue tags should the device reject
an ordered tag.
Remove per-target "current" disconnect and tag queuing
enable flags. These should be per-device and are not
referenced internally be the driver, so we let the OSM
track this state if it needs to.
Use SCSI-3 message terminology.
aic7xxx.h:
The real 7850 does not support Ultra modes, but there are
several cards that use the generic 7850 PCI ID even though
they are using an Ultra capable chip (7859/7860). We start
out with the AHC_ULTRA feature set and then check the
DEVSTATUS register to determine if the capability is really
present.
current -> curr
ahc_calc_residual() is no longer static allowing it to
be called from ahc_update_residual() in aic7xxx_inline.h.
Update some serial eeprom definitions for the latest
BIOS versions.
aic7xxx.reg:
Add a combined DATA_PHASE mask to the SCSIPHASE register
definition to simplify some sequencer code.
aic7xxx.seq:
Take advantage of some performance features available only
on the U160 chips. The auto-ack feature allows us to ack
data-in phases up to the data-fifo size while the sequencer
is still setting up the DMA engine. This greatly reduces
read transfer latency and simplifies testing for transfer
complete (check SCSIEN only). We also disable the expected
phase feature, and enable the new bus free interrupt behavior,
to avoid a few instructions.
Re-arrange the Ultra2+ data phase handling to allow us to
do more work in parallel with the data fifo flushing on a
read.
On an SDTR, ack the message immediately so the target can
prepare the next phase or message byte in parallel with
our work to honor the message.
aic7xxx_93cx6.c:
Remove linux header ifdefs.
aic7xxx_freebsd.c:
current -> curr
Add a module event handler.
Handle tag downgrades in our ahc_send_async() handler.
We won't be able to downgrade to "basic queuing" until
CAM is made aware of this queuing type.
aic7xxx_freebsd.h:
Include cleanups.
Define offsetof if required.
Correct a few comments.
Update prototype of ahc_send_async().
aic7xxx_inline.h:
Implement ahc_update_residual().
aic7xxx_pci.c:
Remove linux header ifdefs.
Correct a few product strings.
Enable several U160 performance enhancing features.
Modify Ultra capability determination so we will enable
Ultra speeds on devices with a 7850 PCI id that happen
to really be a 7859 or 7860.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
515 lines
15 KiB
C
515 lines
15 KiB
C
/*
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* FreeBSD platform specific driver option settings, data structures,
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* function declarations and includes.
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*
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* Copyright (c) 1994-2001 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU Public License ("GPL").
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*
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* $FreeBSD$
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*/
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#ifndef _AIC7XXX_FREEBSD_H_
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#define _AIC7XXX_FREEBSD_H_
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#ifdef CAM_NEW_TRAN_CODE
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#define AHC_NEW_TRAN_SETTINGS
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#endif /* CAM_NEW_TRAN_CODE */
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#include <opt_aic7xxx.h> /* for config options */
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#ifndef NPCI
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#include <pci.h>
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h> /* For device_t */
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#include <sys/eventhandler.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/queue.h>
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#if NPCI > 0
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#define AHC_PCI_CONFIG 1
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#ifdef AHC_ALLOW_MEMIO
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#include <machine/bus_memio.h>
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#endif
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#endif
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <machine/clock.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#if NPCI > 0
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#endif
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#include <cam/cam.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_debug.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/scsi/scsi_all.h>
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#include <cam/scsi/scsi_message.h>
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/****************************** Platform Macros *******************************/
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#define SIM_IS_SCSIBUS_B(ahc, sim) \
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((sim) == ahc->platform_data->sim_b)
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#define SIM_CHANNEL(ahc, sim) \
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(((sim) == ahc->platform_data->sim_b) ? 'B' : 'A')
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#define SIM_SCSI_ID(ahc, sim) \
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(((sim) == ahc->platform_data->sim_b) ? ahc->our_id_b : ahc->our_id)
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#define SIM_PATH(ahc, sim) \
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(((sim) == ahc->platform_data->sim_b) ? ahc->platform_data->path_b \
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: ahc->platform_data->path)
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#define BUILD_SCSIID(ahc, sim, target_id, our_id) \
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((((target_id) << TID_SHIFT) & TID) | (our_id) \
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| (SIM_IS_SCSIBUS_B(ahc, sim) ? TWIN_CHNLB : 0))
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#define SCB_GET_SIM(ahc, scb) \
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(SCB_GET_CHANNEL(ahc, scb) == 'A' ? (ahc)->platform_data->sim \
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: (ahc)->platform_data->sim_b)
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#ifndef offsetof
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#define offsetof(type, member) ((size_t)(&((type *)0)->member))
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#endif
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/************************* Forward Declarations *******************************/
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typedef device_t ahc_dev_softc_t;
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typedef union ccb *ahc_io_ctx_t;
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/***************************** Bus Space/DMA **********************************/
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#define ahc_dma_tag_create(ahc, parent_tag, alignment, boundary, \
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lowaddr, highaddr, filter, filterarg, \
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maxsize, nsegments, maxsegsz, flags, \
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dma_tagp) \
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bus_dma_tag_create(parent_tag, alignment, boundary, \
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lowaddr, highaddr, filter, filterarg, \
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maxsize, nsegments, maxsegsz, flags, \
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dma_tagp)
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#define ahc_dma_tag_destroy(ahc, tag) \
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bus_dma_tag_destroy(tag)
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#define ahc_dmamem_alloc(ahc, dmat, vaddr, flags, mapp) \
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bus_dmamem_alloc(dmat, vaddr, flags, mapp)
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#define ahc_dmamem_free(ahc, dmat, vaddr, map) \
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bus_dmamem_free(dmat, vaddr, map)
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#define ahc_dmamap_create(ahc, tag, flags, mapp) \
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bus_dmamap_create(tag, flags, mapp)
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#define ahc_dmamap_destroy(ahc, tag, map) \
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bus_dmamap_destroy(tag, map)
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#define ahc_dmamap_load(ahc, dmat, map, addr, buflen, callback, \
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callback_arg, flags) \
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bus_dmamap_load(dmat, map, addr, buflen, callback, callback_arg, flags)
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#define ahc_dmamap_unload(ahc, tag, map) \
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bus_dmamap_unload(tag, map)
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#define ahc_dmamap_sync(ahc, dma_tag, dmamap, op) \
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bus_dmamap_sync(dma_tag_dmamap, op)
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/************************ Tunable Driver Parameters **************************/
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/*
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* The number of dma segments supported. The sequencer can handle any number
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* of physically contiguous S/G entrys. To reduce the driver's memory
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* consumption, we limit the number supported to be sufficient to handle
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* the largest mapping supported by the kernel, MAXPHYS. Assuming the
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* transfer is as fragmented as possible and unaligned, this turns out to
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* be the number of paged sized transfers in MAXPHYS plus an extra element
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* to handle any unaligned residual. The sequencer fetches SG elements
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* in cacheline sized chucks, so make the number per-transaction an even
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* multiple of 16 which should align us on even the largest of cacheline
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* boundaries.
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*/
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#define AHC_NSEG (roundup(btoc(MAXPHYS) + 1, 16))
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/* This driver supports target mode */
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#define AHC_TARGET_MODE 1
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/************************** Softc/SCB Platform Data ***************************/
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struct ahc_platform_data {
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/*
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* Hooks into the XPT.
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*/
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struct cam_sim *sim;
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struct cam_sim *sim_b;
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struct cam_path *path;
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struct cam_path *path_b;
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int regs_res_type;
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int regs_res_id;
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int irq_res_type;
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struct resource *regs;
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struct resource *irq;
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void *ih;
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eventhandler_tag eh;
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};
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struct scb_platform_data {
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};
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/********************************* Byte Order *********************************/
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/*
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* XXX Waiting for FreeBSD byte swapping functions.
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* For now assume host is Little Endian.
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*/
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#define ahc_htobe16(x) x
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#define ahc_htobe32(x) x
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#define ahc_htobe64(x) x
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#define ahc_htole16(x) x
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#define ahc_htole32(x) x
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#define ahc_htole64(x) x
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#define ahc_be16toh(x) x
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#define ahc_be32toh(x) x
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#define ahc_be64toh(x) x
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#define ahc_le16toh(x) x
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#define ahc_le32toh(x) x
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#define ahc_le64toh(x) x
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/***************************** Core Includes **********************************/
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#include <dev/aic7xxx/aic7xxx.h>
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/*************************** Device Access ************************************/
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#define ahc_inb(ahc, port) \
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bus_space_read_1((ahc)->tag, (ahc)->bsh, port)
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#define ahc_outb(ahc, port, value) \
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bus_space_write_1((ahc)->tag, (ahc)->bsh, port, value)
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#define ahc_outsb(ahc, port, valp, count) \
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bus_space_write_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
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#define ahc_insb(ahc, port, valp, count) \
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bus_space_read_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
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static __inline void ahc_flush_device_writes(struct ahc_softc *);
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static __inline void
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ahc_flush_device_writes(struct ahc_softc *ahc)
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{
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/* XXX Is this sufficient for all architectures??? */
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ahc_inb(ahc, INTSTAT);
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}
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/**************************** Locking Primitives ******************************/
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/* Lock protecting internal data structures */
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static __inline void ahc_lockinit(struct ahc_softc *);
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static __inline void ahc_lock(struct ahc_softc *, unsigned long *flags);
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static __inline void ahc_unlock(struct ahc_softc *, unsigned long *flags);
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/* Lock held during command compeletion to the upper layer */
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static __inline void ahc_done_lockinit(struct ahc_softc *);
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static __inline void ahc_done_lock(struct ahc_softc *, unsigned long *flags);
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static __inline void ahc_done_unlock(struct ahc_softc *, unsigned long *flags);
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static __inline void
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ahc_lockinit(struct ahc_softc *ahc)
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{
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}
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static __inline void
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ahc_lock(struct ahc_softc *ahc, unsigned long *flags)
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{
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*flags = splcam();
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}
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static __inline void
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ahc_unlock(struct ahc_softc *ahc, unsigned long *flags)
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{
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splx(*flags);
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}
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/* Lock held during command compeletion to the upper layer */
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static __inline void
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ahc_done_lockinit(struct ahc_softc *ahc)
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{
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}
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static __inline void
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ahc_done_lock(struct ahc_softc *ahc, unsigned long *flags)
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{
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}
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static __inline void
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ahc_done_unlock(struct ahc_softc *ahc, unsigned long *flags)
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{
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}
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/****************************** OS Primitives *********************************/
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#define ahc_delay DELAY
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/************************** Transaction Operations ****************************/
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static __inline void ahc_set_transaction_status(struct scb *, uint32_t);
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static __inline void ahc_set_scsi_status(struct scb *, uint32_t);
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static __inline uint32_t ahc_get_transaction_status(struct scb *);
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static __inline uint32_t ahc_get_scsi_status(struct scb *);
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static __inline void ahc_set_transaction_tag(struct scb *, int, u_int);
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static __inline u_long ahc_get_transfer_length(struct scb *);
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static __inline int ahc_get_transfer_dir(struct scb *);
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static __inline void ahc_set_residual(struct scb *, u_long);
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static __inline void ahc_set_sense_residual(struct scb *, u_long);
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static __inline u_long ahc_get_residual(struct scb *);
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static __inline int ahc_perform_autosense(struct scb *);
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static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc*, struct scb*);
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static __inline void ahc_freeze_ccb(union ccb *ccb);
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static __inline void ahc_freeze_scb(struct scb *scb);
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static __inline void ahc_platform_freeze_devq(struct ahc_softc *, struct scb *);
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static __inline int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
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char channel, int lun, u_int tag,
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role_t role, uint32_t status);
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static __inline
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void ahc_set_transaction_status(struct scb *scb, uint32_t status)
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{
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scb->io_ctx->ccb_h.status &= ~CAM_STATUS_MASK;
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scb->io_ctx->ccb_h.status |= status;
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}
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static __inline
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void ahc_set_scsi_status(struct scb *scb, uint32_t status)
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{
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scb->io_ctx->csio.scsi_status = status;
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}
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static __inline
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uint32_t ahc_get_transaction_status(struct scb *scb)
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{
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return (scb->io_ctx->ccb_h.status & CAM_STATUS_MASK);
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}
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static __inline
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uint32_t ahc_get_scsi_status(struct scb *scb)
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{
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return (scb->io_ctx->csio.scsi_status);
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}
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static __inline
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void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type)
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{
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scb->io_ctx->csio.tag_action = type;
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if (enabled)
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scb->io_ctx->ccb_h.flags |= CAM_TAG_ACTION_VALID;
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else
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scb->io_ctx->ccb_h.flags &= ~CAM_TAG_ACTION_VALID;
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}
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static __inline
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u_long ahc_get_transfer_length(struct scb *scb)
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{
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return (scb->io_ctx->csio.dxfer_len);
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}
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static __inline
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int ahc_get_transfer_dir(struct scb *scb)
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{
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return (scb->io_ctx->ccb_h.flags & CAM_DIR_MASK);
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}
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static __inline
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void ahc_set_residual(struct scb *scb, u_long resid)
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{
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scb->io_ctx->csio.resid = resid;
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}
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static __inline
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void ahc_set_sense_residual(struct scb *scb, u_long resid)
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{
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scb->io_ctx->csio.sense_resid = resid;
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}
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static __inline
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u_long ahc_get_residual(struct scb *scb)
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{
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return (scb->io_ctx->csio.resid);
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}
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static __inline
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int ahc_perform_autosense(struct scb *scb)
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{
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return (!(scb->io_ctx->ccb_h.flags & CAM_DIS_AUTOSENSE));
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}
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static __inline uint32_t
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ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb)
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{
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return (sizeof(struct scsi_sense_data));
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}
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static __inline void
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ahc_freeze_ccb(union ccb *ccb)
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{
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if ((ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
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ccb->ccb_h.status |= CAM_DEV_QFRZN;
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xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
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}
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}
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static __inline void
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ahc_freeze_scb(struct scb *scb)
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{
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ahc_freeze_ccb(scb->io_ctx);
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}
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static __inline void
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ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb)
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{
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/* Nothing to do here for FreeBSD */
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}
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static __inline int
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ahc_platform_abort_scbs(struct ahc_softc *ahc, int target,
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char channel, int lun, u_int tag,
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role_t role, uint32_t status)
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{
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/* Nothing to do here for FreeBSD */
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return (0);
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}
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static __inline void
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ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb)
|
|
{
|
|
/* What do we do to generically handle driver resource shortages??? */
|
|
if ((ahc->flags & AHC_RESOURCE_SHORTAGE) != 0
|
|
&& scb->io_ctx != NULL
|
|
&& (scb->io_ctx->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
|
|
scb->io_ctx->ccb_h.status |= CAM_RELEASE_SIMQ;
|
|
ahc->flags &= ~AHC_RESOURCE_SHORTAGE;
|
|
}
|
|
scb->io_ctx = NULL;
|
|
}
|
|
|
|
/********************************** PCI ***************************************/
|
|
#ifdef AHC_PCI_CONFIG
|
|
static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
|
|
int reg, int width);
|
|
static __inline void ahc_pci_write_config(ahc_dev_softc_t pci,
|
|
int reg, uint32_t value,
|
|
int width);
|
|
static __inline int ahc_get_pci_function(ahc_dev_softc_t);
|
|
static __inline int ahc_get_pci_slot(ahc_dev_softc_t);
|
|
static __inline int ahc_get_pci_bus(ahc_dev_softc_t);
|
|
|
|
int ahc_pci_map_registers(struct ahc_softc *ahc);
|
|
int ahc_pci_map_int(struct ahc_softc *ahc);
|
|
|
|
static __inline uint32_t
|
|
ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
|
|
{
|
|
return (pci_read_config(pci, reg, width));
|
|
}
|
|
|
|
static __inline void
|
|
ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
|
|
{
|
|
pci_write_config(pci, reg, value, width);
|
|
}
|
|
|
|
static __inline int
|
|
ahc_get_pci_function(ahc_dev_softc_t pci)
|
|
{
|
|
return (pci_get_function(pci));
|
|
}
|
|
|
|
static __inline int
|
|
ahc_get_pci_slot(ahc_dev_softc_t pci)
|
|
{
|
|
return (pci_get_slot(pci));
|
|
}
|
|
|
|
static __inline int
|
|
ahc_get_pci_bus(ahc_dev_softc_t pci)
|
|
{
|
|
return (pci_get_bus(pci));
|
|
}
|
|
|
|
typedef enum
|
|
{
|
|
AHC_POWER_STATE_D0,
|
|
AHC_POWER_STATE_D1,
|
|
AHC_POWER_STATE_D2,
|
|
AHC_POWER_STATE_D3
|
|
} ahc_power_state;
|
|
|
|
void ahc_power_state_change(struct ahc_softc *ahc,
|
|
ahc_power_state new_state);
|
|
#endif
|
|
/******************************** VL/EISA *************************************/
|
|
int aic7770_map_registers(struct ahc_softc *ahc);
|
|
int aic7770_map_int(struct ahc_softc *ahc, int irq);
|
|
|
|
/********************************* Debug **************************************/
|
|
static __inline void ahc_print_path(struct ahc_softc *, struct scb *);
|
|
static __inline void ahc_platform_dump_card_state(struct ahc_softc *ahc);
|
|
|
|
static __inline void
|
|
ahc_print_path(struct ahc_softc *ahc, struct scb *scb)
|
|
{
|
|
xpt_print_path(scb->io_ctx->ccb_h.path);
|
|
}
|
|
|
|
static __inline void
|
|
ahc_platform_dump_card_state(struct ahc_softc *ahc)
|
|
{
|
|
/* Nothing to do here for FreeBSD */
|
|
}
|
|
/**************************** Transfer Settings *******************************/
|
|
void ahc_notify_xfer_settings_change(struct ahc_softc *,
|
|
struct ahc_devinfo *);
|
|
void ahc_platform_set_tags(struct ahc_softc *, struct ahc_devinfo *,
|
|
int /*enable*/);
|
|
|
|
/************************* Initialization/Teardown ****************************/
|
|
int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg);
|
|
void ahc_platform_free(struct ahc_softc *ahc);
|
|
int ahc_attach(struct ahc_softc *);
|
|
int ahc_softc_comp(struct ahc_softc *lahc, struct ahc_softc *rahc);
|
|
int ahc_detach(device_t);
|
|
|
|
/****************************** Interrupts ************************************/
|
|
void ahc_platform_intr(void *);
|
|
static __inline void ahc_platform_flushwork(struct ahc_softc *ahc);
|
|
static __inline void
|
|
ahc_platform_flushwork(struct ahc_softc *ahc)
|
|
{
|
|
}
|
|
|
|
/************************ Misc Function Declarations **************************/
|
|
timeout_t ahc_timeout;
|
|
void ahc_done(struct ahc_softc *ahc, struct scb *scb);
|
|
void ahc_send_async(struct ahc_softc *, char /*channel*/,
|
|
u_int /*target*/, u_int /*lun*/, ac_code, void *arg);
|
|
#endif /* _AIC7XXX_FREEBSD_H_ */
|