9e2b2d6996
Freescale SoCs use a set of IRQs at the high end of the OpenPIC IRQ list, not counted in the NIRQs of the Feature reporting register. Some SoCs include a MSI inbound window in the PCIe controller configuration registers as well, but some don't. Currently, this only handles the SoCs *with* the MSI window. There are 256 MSIs per MSI bank (32 per MSI IRQ, 8 IRQs per MSI bank). The P5020 has 3 banks, yielding up to 768 MSIs; older SoCs have only one bank. |
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ofw_initrd.c | ||
ofw_machdep.c | ||
ofw_pcib_pci.c | ||
ofw_pcibus.c | ||
ofw_pcibus.h | ||
ofw_real.c | ||
ofw_syscons.c | ||
ofw_syscons.h | ||
ofwcall32.S | ||
ofwcall64.S | ||
openpic_ofw.c | ||
rtas.c |