5b03aba6c8
files to vendor-provided ones. It should make easier to adopt platform code to new revisions of hardware and to use DTS overlays for various Beaglebone extensions (shields/capes). Original dts filenames were not changed, they're now wrappers over dts files provided by TI. So make sure you update .dtb files on your devices as part of kernel update GPIO addressing was changed: instead of one global /dev/gpioc0 there are per-bank instances of /dev/gpiocX. Each bank has 32 pins so for instance pin 121 on /dev/gpioc0 in old addressing scheme is now pin 25 on /dev/gpioc3 On Pandaboard serial console devices was changed from /dev/ttyu0 to /dev/ttyu2 so you'll have to update /etc/ttys to get login prompt on serial port in multiuser mode. Single user mode serial console should work as-is Differential Revision: https://reviews.freebsd.org/D2146 Reviewed by: rpaulo, ian, Michal Meloun, Svatopluk Kraus
418 lines
11 KiB
C
418 lines
11 KiB
C
/*-
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* Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/stdint.h>
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#include <sys/stddef.h>
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#include <sys/param.h>
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#include <sys/sysctl.h>
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#include <sys/sx.h>
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#include <sys/unistd.h>
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#include <sys/callout.h>
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#include <sys/malloc.h>
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#include <sys/priv.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usb_core.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_util.h>
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#define USB_DEBUG_VAR usbssdebug
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/musb_otg.h>
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#include <dev/usb/usb_debug.h>
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#include <sys/rman.h>
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#include <arm/ti/ti_prcm.h>
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#include <arm/ti/ti_scm.h>
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#include <arm/ti/am335x/am335x_scm.h>
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#define USBCTRL_REV 0x00
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#define USBCTRL_CTRL 0x14
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#define USBCTRL_STAT 0x18
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#define USBCTRL_IRQ_STAT0 0x30
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#define IRQ_STAT0_RXSHIFT 16
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#define IRQ_STAT0_TXSHIFT 0
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#define USBCTRL_IRQ_STAT1 0x34
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#define IRQ_STAT1_DRVVBUS (1 << 8)
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#define USBCTRL_INTEN_SET0 0x38
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#define USBCTRL_INTEN_SET1 0x3C
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#define USBCTRL_INTEN_USB_ALL 0x1ff
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#define USBCTRL_INTEN_USB_SOF (1 << 3)
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#define USBCTRL_INTEN_CLR0 0x40
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#define USBCTRL_INTEN_CLR1 0x44
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#define USBCTRL_UTMI 0xE0
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#define USBCTRL_UTMI_FSDATAEXT (1 << 1)
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#define USBCTRL_MODE 0xE8
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#define USBCTRL_MODE_IDDIG (1 << 8)
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#define USBCTRL_MODE_IDDIGMUX (1 << 7)
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/* USBSS resource + 2 MUSB ports */
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#define RES_USBCORE 0
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#define RES_USBCTRL 1
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#define USB_WRITE4(sc, idx, reg, val) do { \
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bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \
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} while (0)
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#define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg))
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#define USBCTRL_WRITE4(sc, reg, val) \
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USB_WRITE4((sc), RES_USBCTRL, (reg), (val))
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#define USBCTRL_READ4(sc, reg) \
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USB_READ4((sc), RES_USBCTRL, (reg))
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static struct resource_spec am335x_musbotg_mem_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_MEMORY, 1, RF_ACTIVE },
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{ -1, 0, 0 }
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};
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#ifdef USB_DEBUG
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static int usbssdebug = 0;
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static SYSCTL_NODE(_hw_usb, OID_AUTO, am335x_usbss, CTLFLAG_RW, 0, "AM335x USBSS");
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SYSCTL_INT(_hw_usb_am335x_usbss, OID_AUTO, debug, CTLFLAG_RW,
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&usbssdebug, 0, "Debug level");
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#endif
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static device_probe_t musbotg_probe;
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static device_attach_t musbotg_attach;
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static device_detach_t musbotg_detach;
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struct musbotg_super_softc {
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struct musbotg_softc sc_otg;
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struct resource *sc_mem_res[2];
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int sc_irq_rid;
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};
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static void
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musbotg_vbus_poll(struct musbotg_super_softc *sc)
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{
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uint32_t stat;
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if (sc->sc_otg.sc_mode == MUSB2_DEVICE_MODE)
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musbotg_vbus_interrupt(&sc->sc_otg, 1);
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else {
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stat = USBCTRL_READ4(sc, USBCTRL_STAT);
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musbotg_vbus_interrupt(&sc->sc_otg, stat & 1);
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}
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}
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/*
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* Arg to musbotg_clocks_on and musbot_clocks_off is
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* a uint32_t * pointing to the SCM register offset.
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*/
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static uint32_t USB_CTRL[] = {SCM_USB_CTRL0, SCM_USB_CTRL1};
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static void
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musbotg_clocks_on(void *arg)
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{
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struct musbotg_softc *sc;
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uint32_t c, reg;
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sc = arg;
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reg = USB_CTRL[sc->sc_id];
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ti_scm_reg_read_4(reg, &c);
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c &= ~3; /* Enable power */
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c |= 1 << 19; /* VBUS detect enable */
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c |= 1 << 20; /* Session end enable */
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ti_scm_reg_write_4(reg, c);
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}
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static void
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musbotg_clocks_off(void *arg)
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{
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struct musbotg_softc *sc;
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uint32_t c, reg;
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sc = arg;
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reg = USB_CTRL[sc->sc_id];
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/* Disable power to PHY */
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ti_scm_reg_read_4(reg, &c);
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ti_scm_reg_write_4(reg, c | 3);
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}
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static void
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musbotg_ep_int_set(struct musbotg_softc *sc, int ep, int on)
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{
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struct musbotg_super_softc *ssc = sc->sc_platform_data;
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uint32_t epmask;
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epmask = ((1 << ep) << IRQ_STAT0_RXSHIFT);
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epmask |= ((1 << ep) << IRQ_STAT0_TXSHIFT);
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if (on)
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USBCTRL_WRITE4(ssc, USBCTRL_INTEN_SET0, epmask);
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else
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USBCTRL_WRITE4(ssc, USBCTRL_INTEN_CLR0, epmask);
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}
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static void
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musbotg_wrapper_interrupt(void *arg)
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{
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struct musbotg_softc *sc = arg;
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struct musbotg_super_softc *ssc = sc->sc_platform_data;
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uint32_t stat, stat0, stat1;
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stat = USBCTRL_READ4(ssc, USBCTRL_STAT);
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stat0 = USBCTRL_READ4(ssc, USBCTRL_IRQ_STAT0);
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stat1 = USBCTRL_READ4(ssc, USBCTRL_IRQ_STAT1);
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if (stat0)
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USBCTRL_WRITE4(ssc, USBCTRL_IRQ_STAT0, stat0);
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if (stat1)
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USBCTRL_WRITE4(ssc, USBCTRL_IRQ_STAT1, stat1);
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DPRINTFN(4, "port%d: stat0=%08x stat1=%08x, stat=%08x\n",
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sc->sc_id, stat0, stat1, stat);
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if (stat1 & IRQ_STAT1_DRVVBUS)
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musbotg_vbus_interrupt(sc, stat & 1);
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musbotg_interrupt(arg, ((stat0 >> 16) & 0xffff),
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stat0 & 0xffff, stat1 & 0xff);
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}
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static int
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musbotg_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "ti,musb-am33xx"))
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return (ENXIO);
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device_set_desc(dev, "TI AM33xx integrated USB OTG controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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musbotg_attach(device_t dev)
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{
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struct musbotg_super_softc *sc = device_get_softc(dev);
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int err;
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uint32_t reg;
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sc->sc_otg.sc_id = device_get_unit(dev);
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/* Request the memory resources */
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err = bus_alloc_resources(dev, am335x_musbotg_mem_spec,
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sc->sc_mem_res);
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if (err) {
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device_printf(dev,
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"Error: could not allocate mem resources\n");
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return (ENXIO);
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}
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/* Request the IRQ resources */
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sc->sc_otg.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->sc_irq_rid, RF_ACTIVE);
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if (sc->sc_otg.sc_irq_res == NULL) {
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device_printf(dev,
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"Error: could not allocate irq resources\n");
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return (ENXIO);
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}
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/* setup MUSB OTG USB controller interface softc */
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sc->sc_otg.sc_clocks_on = &musbotg_clocks_on;
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sc->sc_otg.sc_clocks_off = &musbotg_clocks_off;
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sc->sc_otg.sc_clocks_arg = &sc->sc_otg;
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sc->sc_otg.sc_ep_int_set = musbotg_ep_int_set;
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/* initialise some bus fields */
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sc->sc_otg.sc_bus.parent = dev;
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sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices;
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sc->sc_otg.sc_bus.devices_max = MUSB2_MAX_DEVICES;
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sc->sc_otg.sc_bus.dma_bits = 32;
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/* get all DMA memory */
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if (usb_bus_mem_alloc_all(&sc->sc_otg.sc_bus,
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USB_GET_DMA_TAG(dev), NULL)) {
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device_printf(dev,
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"Failed allocate bus mem for musb\n");
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return (ENOMEM);
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}
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sc->sc_otg.sc_io_res = sc->sc_mem_res[RES_USBCORE];
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sc->sc_otg.sc_io_tag =
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rman_get_bustag(sc->sc_otg.sc_io_res);
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sc->sc_otg.sc_io_hdl =
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rman_get_bushandle(sc->sc_otg.sc_io_res);
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sc->sc_otg.sc_io_size =
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rman_get_size(sc->sc_otg.sc_io_res);
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sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1);
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if (!(sc->sc_otg.sc_bus.bdev)) {
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device_printf(dev, "No busdev for musb\n");
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goto error;
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}
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device_set_ivars(sc->sc_otg.sc_bus.bdev,
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&sc->sc_otg.sc_bus);
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err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res,
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INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, (driver_intr_t *)musbotg_wrapper_interrupt,
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&sc->sc_otg, &sc->sc_otg.sc_intr_hdl);
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if (err) {
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sc->sc_otg.sc_intr_hdl = NULL;
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device_printf(dev,
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"Failed to setup interrupt for musb\n");
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goto error;
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}
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sc->sc_otg.sc_platform_data = sc;
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if (sc->sc_otg.sc_id == 0)
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sc->sc_otg.sc_mode = MUSB2_DEVICE_MODE;
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else
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sc->sc_otg.sc_mode = MUSB2_HOST_MODE;
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/*
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* software-controlled function
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*/
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if (sc->sc_otg.sc_mode == MUSB2_HOST_MODE) {
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reg = USBCTRL_READ4(sc, USBCTRL_MODE);
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reg |= USBCTRL_MODE_IDDIGMUX;
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reg &= ~USBCTRL_MODE_IDDIG;
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USBCTRL_WRITE4(sc, USBCTRL_MODE, reg);
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USBCTRL_WRITE4(sc, USBCTRL_UTMI,
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USBCTRL_UTMI_FSDATAEXT);
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} else {
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reg = USBCTRL_READ4(sc, USBCTRL_MODE);
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reg |= USBCTRL_MODE_IDDIGMUX;
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reg |= USBCTRL_MODE_IDDIG;
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USBCTRL_WRITE4(sc, USBCTRL_MODE, reg);
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}
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reg = USBCTRL_INTEN_USB_ALL & ~USBCTRL_INTEN_USB_SOF;
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USBCTRL_WRITE4(sc, USBCTRL_INTEN_SET1, reg);
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USBCTRL_WRITE4(sc, USBCTRL_INTEN_CLR0, 0xffffffff);
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err = musbotg_init(&sc->sc_otg);
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if (!err)
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err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev);
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if (err)
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goto error;
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/* poll VBUS one time */
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musbotg_vbus_poll(sc);
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return (0);
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error:
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musbotg_detach(dev);
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return (ENXIO);
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}
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static int
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musbotg_detach(device_t dev)
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{
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struct musbotg_super_softc *sc = device_get_softc(dev);
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device_t bdev;
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int err;
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if (sc->sc_otg.sc_bus.bdev) {
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bdev = sc->sc_otg.sc_bus.bdev;
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device_detach(bdev);
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device_delete_child(dev, bdev);
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}
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if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) {
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/*
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* only call musbotg_uninit() after musbotg_init()
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*/
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musbotg_uninit(&sc->sc_otg);
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err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res,
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sc->sc_otg.sc_intr_hdl);
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sc->sc_otg.sc_intr_hdl = NULL;
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}
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usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL);
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/* Free resources if any */
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if (sc->sc_mem_res[0])
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bus_release_resources(dev, am335x_musbotg_mem_spec,
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sc->sc_mem_res);
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if (sc->sc_otg.sc_irq_res)
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bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
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sc->sc_otg.sc_irq_res);
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/* during module unload there are lots of children leftover */
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device_delete_children(dev);
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return (0);
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}
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static device_method_t musbotg_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, musbotg_probe),
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DEVMETHOD(device_attach, musbotg_attach),
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DEVMETHOD(device_detach, musbotg_detach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t musbotg_driver = {
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.name = "musbotg",
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.methods = musbotg_methods,
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.size = sizeof(struct musbotg_super_softc),
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};
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static devclass_t musbotg_devclass;
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DRIVER_MODULE(musbotg, usbss, musbotg_driver, musbotg_devclass, 0, 0);
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MODULE_DEPEND(musbotg, usbss, 1, 1, 1);
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