af3dc4a7ca
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
145 lines
5.3 KiB
C
145 lines
5.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2012, 2013 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Oleksandr Rybalko under sponsorship
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* from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/* Internal Registers definition for Freescale i.MX515 SDMA Core */
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/* SDMA Core Instruction Memory Space */
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#define SDMA_IBUS_ROM_ADDR_BASE 0x0000
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#define SDMA_IBUS_ROM_ADDR_SIZE 0x07ff
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#define SDMA_IBUS_RAM_ADDR_BASE 0x1000
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#define SDMA_IBUS_RAM_ADDR_SIZE 0x1fff
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/* SDMA Core Internal Registers */
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#define SDMA_MC0PTR 0x7000 /* AP (MCU) Channel 0 Pointer R */
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#define SDMA_CCPTR 0x7002 /* Current Channel Pointer R */
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#define SDMA_ECTL_CCPTR_MASK 0x0000ffff
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#define SDMA_ECTL_CCPTR_SHIFT 0
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#define SDMA_CCR 0x7003 /* Current Channel Register R */
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#define SDMA_ECTL_CCR_MASK 0x0000001f
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#define SDMA_ECTL_CCR_SHIFT 0
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#define SDMA_NCR 0x7004 /* Highest Pending Channel Register R */
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#define SDMA_ECTL_NCR_MASK 0x0000001f
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#define SDMA_ECTL_NCR_SHIFT 0
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#define SDMA_EVENTS 0x7005 /* External DMA Requests Mirror R */
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#define SDMA_CCPRI 0x7006 /* Current Channel Priority R */
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#define SDMA_ECTL_CCPRI_MASK 0x00000007
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#define SDMA_ECTL_CCPRI_SHIFT 0
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#define SDMA_NCPRI 0x7007 /* Next Channel Priority R */
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#define SDMA_ECTL_NCPRI_MASK 0x00000007
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#define SDMA_ECTL_NCPRI_SHIFT 0
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#define SDMA_ECOUNT 0x7009 /* OnCE Event Cell Counter R/W */
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#define SDMA_ECTL_ECOUNT_MASK 0x0000ffff
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#define SDMA_ECTL_ECOUNT_SHIFT 0
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#define SDMA_ECTL 0x700A /* OnCE Event Cell Control Register R/W */
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#define SDMA_ECTL_EN (1 << 13)
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#define SDMA_ECTL_CNT (1 << 12)
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#define SDMA_ECTL_ECTC_MASK 0x00000c00
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#define SDMA_ECTL_ECTC_SHIFT 10
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#define SDMA_ECTL_DTC_MASK 0x00000300
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#define SDMA_ECTL_DTC_SHIFT 8
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#define SDMA_ECTL_ATC_MASK 0x000000c0
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#define SDMA_ECTL_ATC_SHIFT 6
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#define SDMA_ECTL_ABTC_MASK 0x00000030
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#define SDMA_ECTL_ABTC_SHIFT 4
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#define SDMA_ECTL_AATC_MASK 0x0000000c
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#define SDMA_ECTL_AATC_SHIFT 2
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#define SDMA_ECTL_ATS_MASK 0x00000003
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#define SDMA_ECTL_ATS_SHIFT 0
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#define SDMA_EAA 0x700B /* OnCE Event Address Register A R/W */
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#define SDMA_ECTL_EAA_MASK 0x0000ffff
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#define SDMA_ECTL_EAA_SHIFT 0
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#define SDMA_EAB 0x700C /* OnCE Event Cell Address Register B R/W */
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#define SDMA_ECTL_EAB_MASK 0x0000ffff
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#define SDMA_ECTL_EAB_SHIFT 0
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#define SDMA_EAM 0x700D /* OnCE Event Cell Address Mask R/W */
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#define SDMA_ECTL_EAM_MASK 0x0000ffff
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#define SDMA_ECTL_EAM_SHIFT 0
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#define SDMA_ED 0x700E /* OnCE Event Cell Data Register R/W */
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#define SDMA_EDM 0x700F /* OnCE Event Cell Data Mask R/W */
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#define SDMA_RTB 0x7018 /* OnCE Real-Time Buffer R/W */
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#define SDMA_TB 0x7019 /* OnCE Trace Buffer R */
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#define SDMA_TB_TBF (1 << 28)
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#define SDMA_TB_TADDR_MASK 0x0fffc000
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#define SDMA_TB_TADDR_SHIFT 14
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#define SDMA_TB_CHFADDR_MASK 0x00003fff
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#define SDMA_TB_CHFADDR_SHIFT 0
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#define SDMA_OSTAT 0x701A /* OnCE Status R */
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#define SDMA_OSTAT_PST_MASK 0x0000f000
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#define SDMA_OSTAT_PST_SHIFT 12
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#define SDMA_OSTAT_RCV (1 << 11)
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#define SDMA_OSTAT_EDR (1 << 10)
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#define SDMA_OSTAT_ODR (1 << 9)
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#define SDMA_OSTAT_SWB (1 << 8)
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#define SDMA_OSTAT_MST (1 << 7)
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#define SDMA_OSTAT_ECDR_MASK 0x00000007
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#define SDMA_OSTAT_ECDR_SHIFT 0
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#define SDMA_MCHN0ADDR 0x701C /* Channel 0 Boot Address R */
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#define SDMA_MCHN0ADDR_SMS_Z (1 << 14)
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#define SDMA_MCHN0ADDR_CHN0ADDR_MASK 0x00003fff
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#define SDMA_MCHN0ADDR_CHN0ADDR_SHIFT 0
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#define SDMA_MODE 0x701D /* Mode Status Register R */
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#define SDMA_MODE_DSPCtrl (1 << 3)
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#define SDMA_MODE_AP_END (1 << 0)
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#define SDMA_LOCK 0x701E /* Lock Status Register R */
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#define SDMA_LOCK_LOCK (1 << 0)
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#define SDMA_EVENTS2 0x701F /* External DMA Requests Mirror #2 R */
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#define SDMA_HE 0x7020 /* AP Enable Register R */
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#define SDMA_PRIV 0x7022 /* Current Channel BP Privilege Register R */
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#define SDMA_PRIV_BPPRIV (1 << 0)
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#define SDMA_PRF_CNT 0x7023 /* Profile Free Running Register R/W */
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#define SDMA_PRF_CNT_SEL_MASK 0xc0000000
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#define SDMA_PRF_CNT_SEL_SHIFT 30
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#define SDMA_PRF_CNT_EN (1 << 29)
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#define SDMA_PRF_CNT_OFL (1 << 22)
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#define SDMA_PRF_CNT_COUNTER_MASK 0x003fffff
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#define SDMA_PRF_CNT_COUNTER_SHIFT 0
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