cb7de87666
Switch the majority of device configuration to FDT from hints. Add BERI_*_BASE configs to reduce duplication in the MDROOT and SDROOT kernels. Add NFS and GSSAPI support by default. MFC after: 3 days Sponsored by: DARPA/AFRL
145 lines
4.0 KiB
Plaintext
145 lines
4.0 KiB
Plaintext
/*-
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* Copyright (c) 2012-2013 Robert N. M. Watson
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* Copyright (c) 2013 SRI International
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/*
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* Device names here have been largely made up on the spot, especially for the
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* "compatible" strings, and might want to be revised.
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*
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* For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in
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* the future, we should likely change to 64-bit.
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*/
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/ {
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model = "SRI/Cambridge BERI simulation";
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compatible = "sri-cambridge,beri-sim";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <1>;
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/*
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* Secondary CPUs all start disabled and use the
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* spin-table enable method. cpu-release-addr must be
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* specified for each cpu other than cpu@0. Values of
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* cpu-release-addr grow down from 0x100000 (kernel).
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*/
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status = "disabled";
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enable-method = "spin-table";
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cpu@0 {
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device-type = "cpu";
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compatible = "sri-cambridge,beri";
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reg = <0>;
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status = "okay";
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};
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/*
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cpu@1 {
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device-type = "cpu";
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compatible = "sri-cambridge,beri";
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reg = <1>;
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// XXX: should we need cached prefix?
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cpu-release-addr = <0xffffffff 0x800fffe0>;
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};
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*/
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <1>;
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/*
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* Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
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* we use mips4k coprocessor 0 interrupt management directly.
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*/
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compatible = "simple-bus", "mips,mips4k";
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ranges = <>;
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memory {
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device_type = "memory";
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reg = <0x0 0x4000000>; // 64M at 0x0
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};
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beripic: beripic@7f804000 {
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compatible = "sri-cambridge,beri-pic";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <0x7f804000 0x400
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0x7f806000 0x10
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0x7f806080 0x10
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0x7f806100 0x10>;
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interrupts = <0 1 2 3 4>;
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hard-interrupt-sources = <64>;
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soft-interrupt-sources = <64>;
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};
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serial@7f000000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f000000 0x40>;
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interrupts = <0>;
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interrupt-parent = <&beripic>;
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};
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serial@7f001000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f001000 0x40>;
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};
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serial@7f002000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f002000 0x40>;
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};
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sdcard@7f008000 {
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compatible = "altera,sdcard_11_2011";
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reg = <0x7f008000 0x400>;
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};
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avgen@0x7f00a000 {
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compatible = "sri-cambridge,avgen";
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reg = <0x7f00a000 0x14>;
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sri-cambridge,width = <4>;
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sri-cambridge,fileio = "rw";
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sri-cambridge,devname = "berirom";
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};
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};
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};
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