444 lines
11 KiB
Plaintext
444 lines
11 KiB
Plaintext
/*
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* MPC8555 CDS Device Tree Source
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*
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* Copyright 2006, 2008 Freescale Semiconductor Inc. All rights reserved
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*
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* Neither the name of Freescale Semiconductor, Inc nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Freescale hereby publishes it under the following licenses:
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*
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* BSD License
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* GNU General Public License, version 2
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*
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* You may select the license of your choice.
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*------------------------------------------------------------------
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/ {
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model = "MPC8555CDS";
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compatible = "MPC8555CDS", "MPC85xxCDS";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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pci1 = &pci1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8555@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x8000>; // L1, 32K
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i-cache-size = <0x8000>; // L1, 32K
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timebase-frequency = <0>; // 33 MHz, from uboot
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bus-frequency = <0>; // 166 MHz
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clock-frequency = <0>; // 825 MHz, from uboot
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next-level-cache = <&L2>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x10000000>; // 256M at 0x0
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};
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localbus@e0005000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,lbc", "fsl,elbc";
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reg = <0xe0005000 0x1000>;
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interrupts = <19 2>;
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interrupt-parent = <&mpic>;
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ranges = <0x0 0x0 0xff800000 0x00800000
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0x1 0x0 0xff000000 0x00800000
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0x2 0x0 0xf8000000 0x00008000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x00800000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nor@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x1 0x0 0x00800000>;
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bank-width = <2>;
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device-width = <1>;
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};
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rtc@2,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "dallas,ds1553";
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reg = <0x2 0x0 0x00008000>;
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bank-width = <1>;
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device-width = <1>;
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};
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};
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soc8555@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0x0 0xe0000000 0x100000>;
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bus-frequency = <0>;
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ecm-law@0 {
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compatible = "fsl,ecm-law";
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reg = <0x0 0x1000>;
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fsl,num-laws = <8>;
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};
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ecm@1000 {
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compatible = "fsl,mpc8555-ecm", "fsl,ecm";
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reg = <0x1000 0x1000>;
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interrupts = <17 2>;
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interrupt-parent = <&mpic>;
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};
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memory-controller@2000 {
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compatible = "fsl,8555-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,8555-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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interrupts = <16 2>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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dma@21300 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
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reg = <0x21300 0x4>;
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ranges = <0x0 0x21100 0x200>;
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cell-index = <0>;
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dma-channel@0 {
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compatible = "fsl,mpc8555-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x0 0x80>;
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cell-index = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <20 2>;
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};
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dma-channel@80 {
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compatible = "fsl,mpc8555-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x80 0x80>;
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cell-index = <1>;
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interrupt-parent = <&mpic>;
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interrupts = <21 2>;
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};
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dma-channel@100 {
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compatible = "fsl,mpc8555-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x100 0x80>;
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cell-index = <2>;
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interrupt-parent = <&mpic>;
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interrupts = <22 2>;
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};
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dma-channel@180 {
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compatible = "fsl,mpc8555-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x180 0x80>;
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cell-index = <3>;
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interrupt-parent = <&mpic>;
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interrupts = <23 2>;
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};
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};
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enet0: ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <29 2 30 2 34 2>;
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interrupt-parent = <&mpic>;
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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mdio@520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <0x520 0x20>;
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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interrupts = <5 1>;
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reg = <0x0>;
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device_type = "ethernet-phy";
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};
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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interrupts = <5 1>;
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reg = <0x1>;
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device_type = "ethernet-phy";
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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enet1: ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <1>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 2 36 2 40 2>;
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interrupt-parent = <&mpic>;
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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mdio@520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-tbi";
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reg = <0x520 0x20>;
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4500 0x100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4600 0x100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <42 2>;
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interrupt-parent = <&mpic>;
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};
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crypto@30000 {
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compatible = "fsl,sec2.0";
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reg = <0x30000 0x10000>;
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interrupts = <45 2>;
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interrupt-parent = <&mpic>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x01010ebf>;
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};
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mpic: pic@40000 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x40000 0x40000>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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};
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cpm@80000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
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reg = <0x80000 0x20000>;
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interrupts = <46 2>;
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interrupt-parent = <&mpic>;
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};
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};
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pci0: pci@e0008000 {
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interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x10 */
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0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
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0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
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0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
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0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
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/* IDSEL 0x11 */
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0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
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0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
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0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
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0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
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/* IDSEL 0x12 (Slot 1) */
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0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
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0x9000 0x0 0x0 0x2 &mpic 0x1 0x1
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0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
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0x9000 0x0 0x0 0x4 &mpic 0x3 0x1
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/* IDSEL 0x13 (Slot 2) */
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0x9800 0x0 0x0 0x1 &mpic 0x1 0x1
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0x9800 0x0 0x0 0x2 &mpic 0x2 0x1
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0x9800 0x0 0x0 0x3 &mpic 0x3 0x1
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0x9800 0x0 0x0 0x4 &mpic 0x0 0x1
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/* IDSEL 0x14 (Slot 3) */
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0xa000 0x0 0x0 0x1 &mpic 0x2 0x1
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0xa000 0x0 0x0 0x2 &mpic 0x3 0x1
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0xa000 0x0 0x0 0x3 &mpic 0x0 0x1
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0xa000 0x0 0x0 0x4 &mpic 0x1 0x1
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/* IDSEL 0x15 (Slot 4) */
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0xa800 0x0 0x0 0x1 &mpic 0x3 0x1
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0xa800 0x0 0x0 0x2 &mpic 0x0 0x1
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0xa800 0x0 0x0 0x3 &mpic 0x1 0x1
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0xa800 0x0 0x0 0x4 &mpic 0x2 0x1
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/* Bus 1 (Tundra Bridge) */
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/* IDSEL 0x12 (ISA bridge) */
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0x19000 0x0 0x0 0x1 &mpic 0x0 0x1
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0x19000 0x0 0x0 0x2 &mpic 0x1 0x1
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0x19000 0x0 0x0 0x3 &mpic 0x2 0x1
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0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>;
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interrupt-parent = <&mpic>;
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interrupts = <24 2>;
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bus-range = <0 0>;
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ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000
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0x1000000 0x0 0x0 0xfee00000 0x0 0x00010000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xe0008000 0x1000>;
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compatible = "fsl,mpc8540-pci";
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device_type = "pci";
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i8259@19000 {
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interrupt-controller;
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device_type = "interrupt-controller";
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reg = <0x19000 0x0 0x0 0x0 0x1>;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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compatible = "chrp,iic";
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interrupts = <1>;
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interrupt-parent = <&pci0>;
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};
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};
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pci1: pci@e0009000 {
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x15 */
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0xa800 0x0 0x0 0x1 &mpic 0xb 0x1
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0xa800 0x0 0x0 0x2 &mpic 0xb 0x1
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0xa800 0x0 0x0 0x3 &mpic 0xb 0x1
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0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>;
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interrupt-parent = <&mpic>;
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interrupts = <25 2>;
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bus-range = <0 0>;
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ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000
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0x1000000 0x0 0x0 0xfee10000 0x0 0x00010000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xe0009000 0x1000>;
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compatible = "fsl,mpc8540-pci";
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device_type = "pci";
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};
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};
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