f4a3eb0297
This patchset adds support to bhnd_chipc for sharing SYS_RES_MEMORY resources with its children, allowing us to hang devices off of bhnd_chipc that rely on access to a subset of the device register space that bhnd_chipc itself must also allocate. We could avoid most of this heavy lifting if RF_SHAREABLE+SYS_RES_MEMORY wasn't limited to use with allocations at the same size/offset. As a work-around, I implemented something similar to vga_pci.c, which implements similar reference counting of of PCI BAR resources for its children. With these changes, chipc will use reference counting of SYS_RES_MEMORY allocation/activation requests, to decide when to allocate/activate/ deactivate/release resources from the parent bhnd(4) bus. The requesting child device is allocated a new resource from chipc's rman, pointing to (possibly a subregion of) the refcounted bhnd resources allocated by chipc. Other resource types are just passed directly to the parent bhnd bus; RF_SHAREABLE works just fine with IRQs. I also lifted the SPROM device code out into a common driver, since this now allows me to hang simple subclasses off of a common driver off of both bhndb_pci and bhnd_chipc. Tested: * (landonf) Tested against BCM4331 and BCM4312, confirmed that SPROM still attaches and can be queried. Submitted by: Landon Fuller <landonf@landonf.org> Reviewed by: mizkha@gmail.com Differential Revision: https://reviews.freebsd.org/D6471
157 lines
5.2 KiB
C
157 lines
5.2 KiB
C
/*-
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* Copyright (c) 2015 Landon Fuller <landon@landonf.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _SIBA_SIBAVAR_H_
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#define _SIBA_SIBAVAR_H_
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/limits.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include "siba.h"
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/*
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* Internal definitions shared by siba(4) driver implementations.
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*/
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struct siba_addrspace;
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struct siba_devinfo;
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struct siba_port;
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struct siba_core_id;
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int siba_probe(device_t dev);
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int siba_attach(device_t dev);
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int siba_detach(device_t dev);
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int siba_resume(device_t dev);
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int siba_suspend(device_t dev);
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uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor);
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struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow,
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u_int core_idx, int unit);
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int siba_add_children(device_t bus,
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const struct bhnd_chipid *chipid);
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struct siba_devinfo *siba_alloc_dinfo(device_t dev,
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const struct siba_core_id *core_id);
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void siba_free_dinfo(device_t dev,
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struct siba_devinfo *dinfo);
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struct siba_port *siba_dinfo_get_port(struct siba_devinfo *dinfo,
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bhnd_port_type port_type, u_int port_num);
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struct siba_addrspace *siba_find_port_addrspace(struct siba_port *port,
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uint8_t sid);
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int siba_append_dinfo_region(struct siba_devinfo *dinfo,
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bhnd_port_type port_type, u_int port_num,
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u_int region_num, uint8_t sid, uint32_t base,
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uint32_t size, uint32_t bus_reserved);
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u_int siba_admatch_offset(uint8_t addrspace);
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int siba_parse_admatch(uint32_t am, uint32_t *addr,
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uint32_t *size);
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/* Sonics configuration register blocks */
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#define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */
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#define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */
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#define SIBA_CFG_NUM_MAX SIBA_CFG_NUM_2_3 /**< maximum number of supported config
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register blocks */
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/** siba(4) address space descriptor */
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struct siba_addrspace {
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uint32_t sa_base; /**< base address */
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uint32_t sa_size; /**< size */
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u_int sa_region_num; /**< bhnd region id */
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uint8_t sa_sid; /**< siba-assigned address space ID */
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int sa_rid; /**< bus resource id */
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uint32_t sa_bus_reserved;/**< number of bytes at high end of
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* address space reserved for the bus */
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STAILQ_ENTRY(siba_addrspace) sa_link;
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};
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/** siba(4) port descriptor */
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struct siba_port {
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bhnd_port_type sp_type; /**< port type */
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u_int sp_num; /**< port number */
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u_int sp_num_addrs; /**< number of address space mappings */
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STAILQ_HEAD(, siba_addrspace) sp_addrs; /**< address spaces mapped to this port */
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};
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/**
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* siba(4) per-core identification info.
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*/
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struct siba_core_id {
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struct bhnd_core_info core_info; /**< standard bhnd(4) core info */
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uint16_t sonics_vendor; /**< OCP vendor identifier used to generate
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* the JEDEC-106 bhnd(4) vendor identifier. */
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uint8_t sonics_rev; /**< sonics backplane revision code */
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uint8_t num_addrspace; /**< number of address ranges mapped to
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this core. */
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uint8_t num_cfg_blocks; /**< number of Sonics configuration register
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blocks mapped to the core's enumeration
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space */
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};
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/**
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* siba(4) per-device info
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*/
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struct siba_devinfo {
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struct resource_list resources; /**< per-core memory regions. */
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struct siba_core_id core_id; /**< core identification info */
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struct siba_port device_port; /**< device port holding ownership
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* of all siba address space
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* entries for this core. */
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/** SIBA_CFG* register blocks */
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struct bhnd_resource *cfg[SIBA_CFG_NUM_MAX];
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/** SIBA_CFG* resource IDs */
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int cfg_rid[SIBA_CFG_NUM_MAX];
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};
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/** siba(4) per-instance state */
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struct siba_softc {
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struct bhnd_softc bhnd_sc; /**< bhnd state */
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device_t dev; /**< siba device */
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device_t hostb_dev; /**< host bridge core, or NULL */
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};
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#endif /* _SIBA_SIBAVAR_H_ */
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