c3f6b2cf9f
- Most of the boards are using U-Boot, u-boot embed a DTB that isn't compiled with -@ (overlay ready) so we cannot use overlays. We want overlays, overlays are nice. - The DTS life is going to linux, then sometimes it's imported in U-Boot but it depend on the SoC family, U-Boot doesn't batch import every DTS like we do. So sometimes to U-Boot DTS are very old. Or when an interesting patch in commited upstream it is in Linux X+2 (roughly 4 months from now), we then have to wait for U-Boot to catch up, that give us between 4 and 6 months to have an update. - Some boards like the Marvell ones have 3 DTS, the one in the vendor U-Boot made by Marvell themselves, the one in u-boot mainline and the one in Linux. I found that the DTS in the Marvell U-Boot have some problem with FreeBSD (especially the macchiatobin that declare node with the same address but not the same size, that is not something that the rman code can handle, it could be modified, I don't know the code well enough). Also some compatible are used when they shouldn't, for example they declare the gpio being orion-gpio while this binding requires interrupts supports, which the node doesn't have. - The above situation is mostly the same with RockChip SoCs (possibly others, those are the only SoCs I work on that have this problem). Note that importing the DTS doesn't mean that every board will use them, I don't intend to copy the DTB to the GENERIC memstick image for the Overdrive 1000/3000 for example, the ones provided by the firmware works fine. RPI3 will still stay an exception as we use the DTB provided by the rpi-firmware package, so they come from the rpi foundation linux fork.
65 lines
1.1 KiB
Plaintext
65 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2017 Marvell Technology Group Ltd.
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*
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* Device Tree file for the Armada 70x0 SoC
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*/
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/ {
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aliases {
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gpio1 = &cp0_gpio1;
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gpio2 = &cp0_gpio2;
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spi1 = &cp0_spi0;
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spi2 = &cp0_spi1;
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};
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};
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/*
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* Instantiate the CP110
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*/
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#define CP110_NAME cp0
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#define CP110_BASE f2000000
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#define CP110_PCIE_IO_BASE 0xf9000000
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#define CP110_PCIE_MEM_BASE 0xf6000000
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#define CP110_PCIE0_BASE f2600000
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#define CP110_PCIE1_BASE f2620000
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#define CP110_PCIE2_BASE f2640000
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#include "armada-cp110.dtsi"
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#undef CP110_NAME
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#undef CP110_BASE
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#undef CP110_PCIE_IO_BASE
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#undef CP110_PCIE_MEM_BASE
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#undef CP110_PCIE0_BASE
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#undef CP110_PCIE1_BASE
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#undef CP110_PCIE2_BASE
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&cp0_gpio1 {
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status = "okay";
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};
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&cp0_gpio2 {
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status = "okay";
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};
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&cp0_syscon0 {
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cp0_pinctrl: pinctrl {
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compatible = "marvell,armada-7k-pinctrl";
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nand_pins: nand-pins {
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marvell,pins =
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"mpp15", "mpp16", "mpp17", "mpp18",
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"mpp19", "mpp20", "mpp21", "mpp22",
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"mpp23", "mpp24", "mpp25", "mpp26",
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"mpp27";
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marvell,function = "dev";
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};
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nand_rb: nand-rb {
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marvell,pins = "mpp13";
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marvell,function = "nf";
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};
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};
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};
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