bf1e897425
value on entry and exit. This isn't as easy as it sounds because when we recursively trap or interrupt, we have to avoid duplicating the swapgs instruction or we end up back with the userland %gs. I implemented this by testing TF_CS to see if we're coming from supervisor mode already, and check for returning to supervisor. To avoid a race with interrupts in the brief period after beginning executing the handler and before the swapgs, convert all trap gates to interrupt gates, and reenable interrupts immediately after the swapgs. I am not happy with this. There are other possible ways to do this that should be investigated. (eg: storing the GS.base MSR value in the trapframe) Add some sysarch functions to let the userland code get to this. Approved by: re (blanket amd64/*)
77 lines
2.7 KiB
C
77 lines
2.7 KiB
C
/*-
|
|
* Copyright (c) 1990 The Regents of the University of California.
|
|
* All rights reserved.
|
|
*
|
|
* This code is derived from software contributed to Berkeley by
|
|
* William Jolitz.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution.
|
|
* 3. All advertising materials mentioning features or use of this software
|
|
* must display the following acknowledgement:
|
|
* This product includes software developed by the University of
|
|
* California, Berkeley and its contributors.
|
|
* 4. Neither the name of the University nor the names of its contributors
|
|
* may be used to endorse or promote products derived from this software
|
|
* without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
* SUCH DAMAGE.
|
|
*
|
|
* from: @(#)pcb.h 5.10 (Berkeley) 5/12/91
|
|
* $FreeBSD$
|
|
*/
|
|
|
|
#ifndef _I386_PCB_H_
|
|
#define _I386_PCB_H_
|
|
|
|
/*
|
|
* Intel 386 process control block
|
|
*/
|
|
#include <machine/npx.h>
|
|
|
|
struct pcb {
|
|
register_t padxx[8];
|
|
register_t pcb_cr3;
|
|
register_t pcb_r15;
|
|
register_t pcb_r14;
|
|
register_t pcb_r13;
|
|
register_t pcb_r12;
|
|
register_t pcb_rbp;
|
|
register_t pcb_rsp;
|
|
register_t pcb_rbx;
|
|
register_t pcb_rip;
|
|
register_t pcb_rflags;
|
|
register_t pcb_fsbase;
|
|
register_t pcb_gsbase;
|
|
|
|
struct savefpu pcb_save;
|
|
u_long pcb_flags;
|
|
#define PCB_NPXTRAP 0x01 /* npx trap pending */
|
|
#define PCB_NPXINITDONE 0x02 /* fpu state is initialized */
|
|
#define PCB_FULLCTX 0x04 /* full context restore on sysret */
|
|
|
|
caddr_t pcb_onfault; /* copyin/out fault recovery */
|
|
};
|
|
|
|
#ifdef _KERNEL
|
|
void savectx(struct pcb *);
|
|
#endif
|
|
|
|
#endif /* _I386_PCB_H_ */
|