617 lines
16 KiB
C
617 lines
16 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2016,2017 SoftIron Inc.
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* Copyright (c) 2020 Advanced Micro Devices, Inc.
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*
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* This software was developed by Andrew Turner under
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* the sponsorship of SoftIron Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/queue.h>
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#include <sys/rman.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/sx.h>
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#include <sys/taskqueue.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include "miibus_if.h"
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#include "xgbe.h"
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#include "xgbe-common.h"
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static device_probe_t axgbe_probe;
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static device_attach_t axgbe_attach;
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struct axgbe_softc {
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/* Must be first */
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struct xgbe_prv_data prv;
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uint8_t mac_addr[ETHER_ADDR_LEN];
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struct ifmedia media;
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};
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static struct ofw_compat_data compat_data[] = {
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{ "amd,xgbe-seattle-v1a", true },
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{ NULL, false }
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};
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static struct resource_spec old_phy_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Rx/Tx regs */
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{ SYS_RES_MEMORY, 1, RF_ACTIVE }, /* Integration regs */
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{ SYS_RES_MEMORY, 2, RF_ACTIVE }, /* Integration regs */
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* Interrupt */
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{ -1, 0 }
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};
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static struct resource_spec old_mac_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE }, /* MAC regs */
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{ SYS_RES_MEMORY, 1, RF_ACTIVE }, /* PCS regs */
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* Device interrupt */
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/* Per-channel interrupts */
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{ SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL },
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{ SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL },
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{ SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL },
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{ SYS_RES_IRQ, 4, RF_ACTIVE | RF_OPTIONAL },
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{ -1, 0 }
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};
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static struct resource_spec mac_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE }, /* MAC regs */
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{ SYS_RES_MEMORY, 1, RF_ACTIVE }, /* PCS regs */
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{ SYS_RES_MEMORY, 2, RF_ACTIVE }, /* Rx/Tx regs */
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{ SYS_RES_MEMORY, 3, RF_ACTIVE }, /* Integration regs */
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{ SYS_RES_MEMORY, 4, RF_ACTIVE }, /* Integration regs */
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* Device interrupt */
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/* Per-channel and auto-negotiation interrupts */
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{ SYS_RES_IRQ, 1, RF_ACTIVE },
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{ SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL },
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{ SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL },
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{ SYS_RES_IRQ, 4, RF_ACTIVE | RF_OPTIONAL },
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{ SYS_RES_IRQ, 5, RF_ACTIVE | RF_OPTIONAL },
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{ -1, 0 }
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};
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static struct xgbe_version_data xgbe_v1 = {
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.init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v1,
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.xpcs_access = XGBE_XPCS_ACCESS_V1,
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.tx_max_fifo_size = 81920,
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.rx_max_fifo_size = 81920,
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.tx_tstamp_workaround = 1,
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};
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MALLOC_DEFINE(M_AXGBE, "axgbe", "axgbe data");
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static void
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axgbe_init(void *p)
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{
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struct axgbe_softc *sc;
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if_t ifp;
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sc = p;
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ifp = sc->prv.netdev;
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if (if_getdrvflags(ifp) & IFF_DRV_RUNNING)
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return;
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if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0);
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}
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static int
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axgbe_ioctl(if_t ifp, unsigned long command, caddr_t data)
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{
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struct axgbe_softc *sc = if_getsoftc(ifp);
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struct ifreq *ifr = (struct ifreq *)data;
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int error = 0;
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switch(command) {
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case SIOCSIFMTU:
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if (ifr->ifr_mtu < ETHERMIN || ifr->ifr_mtu > ETHERMTU_JUMBO)
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error = EINVAL;
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/* TODO - change it to iflib way */
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break;
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case SIOCSIFFLAGS:
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error = 0;
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break;
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case SIOCSIFMEDIA:
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case SIOCGIFMEDIA:
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error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
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break;
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default:
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error = ether_ioctl(ifp, command, data);
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break;
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}
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return (error);
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}
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static void
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axgbe_qflush(if_t ifp)
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{
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if_qflush(ifp);
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}
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static int
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axgbe_media_change(if_t ifp)
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{
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struct axgbe_softc *sc;
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int cur_media;
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sc = if_getsoftc(ifp);
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sx_xlock(&sc->prv.an_mutex);
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cur_media = sc->media.ifm_cur->ifm_media;
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switch (IFM_SUBTYPE(cur_media)) {
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case IFM_10G_KR:
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sc->prv.phy.speed = SPEED_10000;
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sc->prv.phy.autoneg = AUTONEG_DISABLE;
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break;
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case IFM_2500_KX:
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sc->prv.phy.speed = SPEED_2500;
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sc->prv.phy.autoneg = AUTONEG_DISABLE;
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break;
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case IFM_1000_KX:
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sc->prv.phy.speed = SPEED_1000;
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sc->prv.phy.autoneg = AUTONEG_DISABLE;
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break;
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case IFM_AUTO:
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sc->prv.phy.autoneg = AUTONEG_ENABLE;
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break;
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}
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sx_xunlock(&sc->prv.an_mutex);
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return (-sc->prv.phy_if.phy_config_aneg(&sc->prv));
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}
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static void
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axgbe_media_status(if_t ifp, struct ifmediareq *ifmr)
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{
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struct axgbe_softc *sc;
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sc = if_getsoftc(ifp);
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ifmr->ifm_status = IFM_AVALID;
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if (!sc->prv.phy.link)
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return;
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ifmr->ifm_status |= IFM_ACTIVE;
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ifmr->ifm_active = IFM_ETHER;
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if (sc->prv.phy.duplex == DUPLEX_FULL)
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ifmr->ifm_active |= IFM_FDX;
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else
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ifmr->ifm_active |= IFM_HDX;
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switch (sc->prv.phy.speed) {
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case SPEED_10000:
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ifmr->ifm_active |= IFM_10G_KR;
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break;
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case SPEED_2500:
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ifmr->ifm_active |= IFM_2500_KX;
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break;
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case SPEED_1000:
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ifmr->ifm_active |= IFM_1000_KX;
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break;
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}
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}
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static uint64_t
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axgbe_get_counter(if_t ifp, ift_counter c)
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{
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struct xgbe_prv_data *pdata = if_getsoftc(ifp);
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struct xgbe_mmc_stats *pstats = &pdata->mmc_stats;
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DBGPR("-->%s\n", __func__);
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pdata->hw_if.read_mmc_stats(pdata);
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switch(c) {
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case IFCOUNTER_IPACKETS:
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return (pstats->rxframecount_gb);
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case IFCOUNTER_IERRORS:
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return (pstats->rxframecount_gb -
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pstats->rxbroadcastframes_g -
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pstats->rxmulticastframes_g -
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pstats->rxunicastframes_g);
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case IFCOUNTER_OPACKETS:
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return (pstats->txframecount_gb);
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case IFCOUNTER_OERRORS:
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return (pstats->txframecount_gb - pstats->txframecount_g);
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case IFCOUNTER_IBYTES:
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return (pstats->rxoctetcount_gb);
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case IFCOUNTER_OBYTES:
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return (pstats->txoctetcount_gb);
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default:
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return (if_get_counter_default(ifp, c));
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}
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}
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static int
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axgbe_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev, "AMD 10 Gigabit Ethernet");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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axgbe_get_optional_prop(device_t dev, phandle_t node, const char *name,
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int *data, size_t len)
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{
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if (!OF_hasprop(node, name))
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return (-1);
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if (OF_getencprop(node, name, data, len) <= 0) {
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device_printf(dev,"%s property is invalid\n", name);
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return (ENXIO);
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}
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return (0);
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}
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static int
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axgbe_attach(device_t dev)
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{
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struct axgbe_softc *sc;
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if_t ifp;
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pcell_t phy_handle;
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device_t phydev;
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phandle_t node, phy_node;
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struct resource *mac_res[11];
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struct resource *phy_res[4];
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ssize_t len;
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int error, i, j;
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sc = device_get_softc(dev);
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sc->prv.vdata = &xgbe_v1;
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node = ofw_bus_get_node(dev);
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if (OF_getencprop(node, "phy-handle", &phy_handle,
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sizeof(phy_handle)) <= 0) {
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phy_node = node;
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if (bus_alloc_resources(dev, mac_spec, mac_res)) {
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device_printf(dev,
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"could not allocate phy resources\n");
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return (ENXIO);
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}
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sc->prv.xgmac_res = mac_res[0];
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sc->prv.xpcs_res = mac_res[1];
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sc->prv.rxtx_res = mac_res[2];
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sc->prv.sir0_res = mac_res[3];
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sc->prv.sir1_res = mac_res[4];
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sc->prv.dev_irq_res = mac_res[5];
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sc->prv.per_channel_irq = OF_hasprop(node,
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XGBE_DMA_IRQS_PROPERTY);
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for (i = 0, j = 6; j < nitems(mac_res) - 1 &&
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mac_res[j + 1] != NULL; i++, j++) {
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if (sc->prv.per_channel_irq) {
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sc->prv.chan_irq_res[i] = mac_res[j];
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}
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}
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/* The last entry is the auto-negotiation interrupt */
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sc->prv.an_irq_res = mac_res[j];
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} else {
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phydev = OF_device_from_xref(phy_handle);
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phy_node = ofw_bus_get_node(phydev);
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if (bus_alloc_resources(phydev, old_phy_spec, phy_res)) {
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device_printf(dev,
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"could not allocate phy resources\n");
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return (ENXIO);
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}
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if (bus_alloc_resources(dev, old_mac_spec, mac_res)) {
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device_printf(dev,
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"could not allocate mac resources\n");
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return (ENXIO);
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}
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sc->prv.rxtx_res = phy_res[0];
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sc->prv.sir0_res = phy_res[1];
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sc->prv.sir1_res = phy_res[2];
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sc->prv.an_irq_res = phy_res[3];
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sc->prv.xgmac_res = mac_res[0];
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sc->prv.xpcs_res = mac_res[1];
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sc->prv.dev_irq_res = mac_res[2];
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sc->prv.per_channel_irq = OF_hasprop(node,
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XGBE_DMA_IRQS_PROPERTY);
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if (sc->prv.per_channel_irq) {
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for (i = 0, j = 3; i < nitems(sc->prv.chan_irq_res) &&
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mac_res[j] != NULL; i++, j++) {
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sc->prv.chan_irq_res[i] = mac_res[j];
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}
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}
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}
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if ((len = OF_getproplen(node, "mac-address")) < 0) {
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device_printf(dev, "No mac-address property\n");
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return (EINVAL);
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}
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if (len != ETHER_ADDR_LEN)
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return (EINVAL);
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OF_getprop(node, "mac-address", sc->mac_addr, ETHER_ADDR_LEN);
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sc->prv.netdev = ifp = if_alloc(IFT_ETHER);
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if (ifp == NULL) {
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device_printf(dev, "Cannot alloc ifnet\n");
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return (ENXIO);
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}
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sc->prv.dev = dev;
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sc->prv.dmat = bus_get_dma_tag(dev);
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sc->prv.phy.advertising = ADVERTISED_10000baseKR_Full |
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ADVERTISED_1000baseKX_Full;
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/*
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* Read the needed properties from the phy node.
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*/
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/* This is documented as optional, but Linux requires it */
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if (OF_getencprop(phy_node, XGBE_SPEEDSET_PROPERTY, &sc->prv.speed_set,
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sizeof(sc->prv.speed_set)) <= 0) {
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device_printf(dev, "%s property is missing\n",
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XGBE_SPEEDSET_PROPERTY);
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return (EINVAL);
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}
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error = axgbe_get_optional_prop(dev, phy_node, XGBE_BLWC_PROPERTY,
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sc->prv.serdes_blwc, sizeof(sc->prv.serdes_blwc));
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if (error > 0) {
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return (error);
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} else if (error < 0) {
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sc->prv.serdes_blwc[0] = XGBE_SPEED_1000_BLWC;
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sc->prv.serdes_blwc[1] = XGBE_SPEED_2500_BLWC;
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sc->prv.serdes_blwc[2] = XGBE_SPEED_10000_BLWC;
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}
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error = axgbe_get_optional_prop(dev, phy_node, XGBE_CDR_RATE_PROPERTY,
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sc->prv.serdes_cdr_rate, sizeof(sc->prv.serdes_cdr_rate));
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if (error > 0) {
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return (error);
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} else if (error < 0) {
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sc->prv.serdes_cdr_rate[0] = XGBE_SPEED_1000_CDR;
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sc->prv.serdes_cdr_rate[1] = XGBE_SPEED_2500_CDR;
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sc->prv.serdes_cdr_rate[2] = XGBE_SPEED_10000_CDR;
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}
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error = axgbe_get_optional_prop(dev, phy_node, XGBE_PQ_SKEW_PROPERTY,
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sc->prv.serdes_pq_skew, sizeof(sc->prv.serdes_pq_skew));
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if (error > 0) {
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return (error);
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} else if (error < 0) {
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sc->prv.serdes_pq_skew[0] = XGBE_SPEED_1000_PQ;
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sc->prv.serdes_pq_skew[1] = XGBE_SPEED_2500_PQ;
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sc->prv.serdes_pq_skew[2] = XGBE_SPEED_10000_PQ;
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}
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error = axgbe_get_optional_prop(dev, phy_node, XGBE_TX_AMP_PROPERTY,
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sc->prv.serdes_tx_amp, sizeof(sc->prv.serdes_tx_amp));
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if (error > 0) {
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return (error);
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} else if (error < 0) {
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sc->prv.serdes_tx_amp[0] = XGBE_SPEED_1000_TXAMP;
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sc->prv.serdes_tx_amp[1] = XGBE_SPEED_2500_TXAMP;
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sc->prv.serdes_tx_amp[2] = XGBE_SPEED_10000_TXAMP;
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}
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error = axgbe_get_optional_prop(dev, phy_node, XGBE_DFE_CFG_PROPERTY,
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sc->prv.serdes_dfe_tap_cfg, sizeof(sc->prv.serdes_dfe_tap_cfg));
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if (error > 0) {
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return (error);
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} else if (error < 0) {
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sc->prv.serdes_dfe_tap_cfg[0] = XGBE_SPEED_1000_DFE_TAP_CONFIG;
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sc->prv.serdes_dfe_tap_cfg[1] = XGBE_SPEED_2500_DFE_TAP_CONFIG;
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sc->prv.serdes_dfe_tap_cfg[2] = XGBE_SPEED_10000_DFE_TAP_CONFIG;
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}
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error = axgbe_get_optional_prop(dev, phy_node, XGBE_DFE_ENA_PROPERTY,
|
|
sc->prv.serdes_dfe_tap_ena, sizeof(sc->prv.serdes_dfe_tap_ena));
|
|
if (error > 0) {
|
|
return (error);
|
|
} else if (error < 0) {
|
|
sc->prv.serdes_dfe_tap_ena[0] = XGBE_SPEED_1000_DFE_TAP_ENABLE;
|
|
sc->prv.serdes_dfe_tap_ena[1] = XGBE_SPEED_2500_DFE_TAP_ENABLE;
|
|
sc->prv.serdes_dfe_tap_ena[2] = XGBE_SPEED_10000_DFE_TAP_ENABLE;
|
|
}
|
|
|
|
/* Check if the NIC is DMA coherent */
|
|
sc->prv.coherent = OF_hasprop(node, "dma-coherent");
|
|
if (sc->prv.coherent) {
|
|
sc->prv.arcr = XGBE_DMA_OS_ARCR;
|
|
sc->prv.awcr = XGBE_DMA_OS_AWCR;
|
|
} else {
|
|
sc->prv.arcr = XGBE_DMA_SYS_ARCR;
|
|
sc->prv.awcr = XGBE_DMA_SYS_AWCR;
|
|
}
|
|
|
|
/* Create the lock & workqueues */
|
|
spin_lock_init(&sc->prv.xpcs_lock);
|
|
sc->prv.dev_workqueue = taskqueue_create("axgbe", M_WAITOK,
|
|
taskqueue_thread_enqueue, &sc->prv.dev_workqueue);
|
|
taskqueue_start_threads(&sc->prv.dev_workqueue, 1, PI_NET,
|
|
"axgbe taskq");
|
|
|
|
/* Set the needed pointers */
|
|
xgbe_init_function_ptrs_phy(&sc->prv.phy_if);
|
|
xgbe_init_function_ptrs_dev(&sc->prv.hw_if);
|
|
xgbe_init_function_ptrs_desc(&sc->prv.desc_if);
|
|
sc->prv.vdata->init_function_ptrs_phy_impl(&sc->prv.phy_if);
|
|
|
|
/* Reset the hardware */
|
|
sc->prv.hw_if.exit(&sc->prv);
|
|
|
|
/* Read the hardware features */
|
|
xgbe_get_all_hw_features(&sc->prv);
|
|
|
|
/* Set default values */
|
|
sc->prv.tx_desc_count = XGBE_TX_DESC_CNT;
|
|
sc->prv.tx_sf_mode = MTL_TSF_ENABLE;
|
|
sc->prv.tx_threshold = MTL_TX_THRESHOLD_64;
|
|
sc->prv.tx_osp_mode = DMA_OSP_ENABLE;
|
|
sc->prv.rx_desc_count = XGBE_RX_DESC_CNT;
|
|
sc->prv.rx_sf_mode = MTL_RSF_DISABLE;
|
|
sc->prv.rx_threshold = MTL_RX_THRESHOLD_64;
|
|
sc->prv.pbl = DMA_PBL_128;
|
|
sc->prv.pause_autoneg = 1;
|
|
sc->prv.tx_pause = 1;
|
|
sc->prv.rx_pause = 1;
|
|
sc->prv.phy_speed = SPEED_UNKNOWN;
|
|
sc->prv.power_down = 0;
|
|
|
|
/* TODO: Limit to min(ncpus, hw rings) */
|
|
sc->prv.tx_ring_count = 1;
|
|
sc->prv.tx_q_count = 1;
|
|
sc->prv.rx_ring_count = 1;
|
|
sc->prv.rx_q_count = sc->prv.hw_feat.rx_q_cnt;
|
|
|
|
/* Init the PHY */
|
|
sc->prv.phy_if.phy_init(&sc->prv);
|
|
|
|
/* Set the coalescing */
|
|
xgbe_init_rx_coalesce(&sc->prv);
|
|
xgbe_init_tx_coalesce(&sc->prv);
|
|
|
|
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
|
|
if_setinitfn(ifp, axgbe_init);
|
|
if_setsoftc(ifp, sc);
|
|
if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
|
|
if_setioctlfn(ifp, axgbe_ioctl);
|
|
/* TODO - change it to iflib way */
|
|
if_setqflushfn(ifp, axgbe_qflush);
|
|
if_setgetcounterfn(ifp, axgbe_get_counter);
|
|
|
|
/* TODO: Support HW offload */
|
|
if_setcapabilities(ifp, 0);
|
|
if_setcapenable(ifp, 0);
|
|
if_sethwassist(ifp, 0);
|
|
|
|
ether_ifattach(ifp, sc->mac_addr);
|
|
|
|
ifmedia_init(&sc->media, IFM_IMASK, axgbe_media_change,
|
|
axgbe_media_status);
|
|
#ifdef notyet
|
|
ifmedia_add(&sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL);
|
|
#endif
|
|
ifmedia_add(&sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL);
|
|
ifmedia_add(&sc->media, IFM_ETHER | IFM_AUTO, 0, NULL);
|
|
ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO);
|
|
|
|
set_bit(XGBE_DOWN, &sc->prv.dev_state);
|
|
|
|
/* TODO - change it to iflib way */
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t axgbe_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, axgbe_probe),
|
|
DEVMETHOD(device_attach, axgbe_attach),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
DEFINE_CLASS_0(axgbe, axgbe_driver, axgbe_methods,
|
|
sizeof(struct axgbe_softc));
|
|
DRIVER_MODULE(axa, simplebus, axgbe_driver, 0, 0);
|
|
|
|
|
|
static struct ofw_compat_data phy_compat_data[] = {
|
|
{ "amd,xgbe-phy-seattle-v1a", true },
|
|
{ NULL, false }
|
|
};
|
|
|
|
static int
|
|
axgbephy_probe(device_t dev)
|
|
{
|
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
return (ENXIO);
|
|
|
|
if (!ofw_bus_search_compatible(dev, phy_compat_data)->ocd_data)
|
|
return (ENXIO);
|
|
|
|
device_set_desc(dev, "AMD 10 Gigabit Ethernet");
|
|
return (BUS_PROBE_DEFAULT);
|
|
}
|
|
|
|
static int
|
|
axgbephy_attach(device_t dev)
|
|
{
|
|
phandle_t node;
|
|
|
|
node = ofw_bus_get_node(dev);
|
|
OF_device_register_xref(OF_xref_from_node(node), dev);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t axgbephy_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, axgbephy_probe),
|
|
DEVMETHOD(device_attach, axgbephy_attach),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
DEFINE_CLASS_0(axgbephy, axgbephy_driver, axgbephy_methods, 0);
|
|
EARLY_DRIVER_MODULE(axgbephy, simplebus, axgbephy_driver,
|
|
0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
|