314 lines
7.6 KiB
C
314 lines
7.6 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2007, Juniper Networks, Inc.
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* Copyright (c) 2012-2013, SRI International
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* All rights reserved.
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* (FA8750-10-C-0237) ("CTSRD"), as part of the DARPA CRASH research
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* programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include "opt_cfi.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/ioccom.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/sysctl.h>
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#include <sys/types.h>
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#include <sys/uio.h>
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#include <sys/cfictl.h>
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#include <machine/atomic.h>
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#include <machine/bus.h>
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#include <dev/cfi/cfi_var.h>
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static d_open_t cfi_devopen;
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static d_close_t cfi_devclose;
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static d_read_t cfi_devread;
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static d_write_t cfi_devwrite;
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static d_ioctl_t cfi_devioctl;
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struct cdevsw cfi_cdevsw = {
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.d_version = D_VERSION,
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.d_flags = 0,
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.d_name = cfi_driver_name,
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.d_open = cfi_devopen,
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.d_close = cfi_devclose,
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.d_read = cfi_devread,
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.d_write = cfi_devwrite,
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.d_ioctl = cfi_devioctl,
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};
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/*
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* Begin writing into a new block/sector. We read the sector into
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* memory and keep updating that, until we move into another sector
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* or the process stops writing. At that time we write the whole
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* sector to flash (see cfi_block_finish). To avoid unneeded erase
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* cycles, keep a pristine copy of the sector on hand.
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*/
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int
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cfi_block_start(struct cfi_softc *sc, u_int ofs)
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{
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union {
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uint8_t *x8;
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uint16_t *x16;
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uint32_t *x32;
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} ptr;
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u_int rofs, rsz;
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uint32_t val;
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int r;
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rofs = 0;
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for (r = 0; r < sc->sc_regions; r++) {
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rsz = sc->sc_region[r].r_blocks * sc->sc_region[r].r_blksz;
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if (ofs < rofs + rsz)
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break;
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rofs += rsz;
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}
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if (r == sc->sc_regions)
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return (EFAULT);
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sc->sc_wrbufsz = sc->sc_region[r].r_blksz;
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sc->sc_wrbuf = malloc(sc->sc_wrbufsz, M_TEMP, M_WAITOK);
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sc->sc_wrofs = ofs - (ofs - rofs) % sc->sc_wrbufsz;
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/* Read the block from flash for byte-serving. */
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ptr.x8 = sc->sc_wrbuf;
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for (r = 0; r < sc->sc_wrbufsz; r += sc->sc_width) {
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val = cfi_read_raw(sc, sc->sc_wrofs + r);
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switch (sc->sc_width) {
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case 1:
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*(ptr.x8)++ = val;
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break;
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case 2:
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*(ptr.x16)++ = val;
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break;
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case 4:
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*(ptr.x32)++ = val;
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break;
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}
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}
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sc->sc_wrbufcpy = malloc(sc->sc_wrbufsz, M_TEMP, M_WAITOK);
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memcpy(sc->sc_wrbufcpy, sc->sc_wrbuf, sc->sc_wrbufsz);
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sc->sc_writing = 1;
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return (0);
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}
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/*
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* Finish updating the current block/sector by writing the compound
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* set of changes to the flash.
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*/
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int
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cfi_block_finish(struct cfi_softc *sc)
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{
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int error;
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error = cfi_write_block(sc);
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free(sc->sc_wrbuf, M_TEMP);
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free(sc->sc_wrbufcpy, M_TEMP);
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sc->sc_wrbuf = NULL;
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sc->sc_wrbufsz = 0;
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sc->sc_wrofs = 0;
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sc->sc_writing = 0;
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return (error);
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}
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static int
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cfi_devopen(struct cdev *dev, int oflags, int devtype, struct thread *td)
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{
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struct cfi_softc *sc;
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sc = dev->si_drv1;
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/* We allow only 1 open. */
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if (!atomic_cmpset_acq_ptr((uintptr_t *)&sc->sc_opened,
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(uintptr_t)NULL, (uintptr_t)td->td_proc))
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return (EBUSY);
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return (0);
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}
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static int
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cfi_devclose(struct cdev *dev, int fflag, int devtype, struct thread *td)
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{
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struct cfi_softc *sc;
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int error;
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sc = dev->si_drv1;
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/* Sanity. Not really necessary. */
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if (sc->sc_opened != td->td_proc)
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return (ENXIO);
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error = (sc->sc_writing) ? cfi_block_finish(sc) : 0;
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sc->sc_opened = NULL;
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return (error);
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}
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static int
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cfi_devread(struct cdev *dev, struct uio *uio, int ioflag)
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{
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union {
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uint8_t x8[4];
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uint16_t x16[2];
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uint32_t x32[1];
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} buf;
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struct cfi_softc *sc;
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u_int ofs;
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uint32_t val;
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int error;
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sc = dev->si_drv1;
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error = (sc->sc_writing) ? cfi_block_finish(sc) : 0;
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if (!error)
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error = (uio->uio_offset > sc->sc_size) ? EIO : 0;
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while (error == 0 && uio->uio_resid > 0 &&
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uio->uio_offset < sc->sc_size) {
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ofs = uio->uio_offset;
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val = cfi_read_raw(sc, ofs);
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switch (sc->sc_width) {
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case 1:
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buf.x8[0] = val;
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break;
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case 2:
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buf.x16[0] = val;
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break;
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case 4:
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buf.x32[0] = val;
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break;
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}
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ofs &= sc->sc_width - 1;
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error = uiomove(buf.x8 + ofs,
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MIN(uio->uio_resid, sc->sc_width - ofs), uio);
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}
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return (error);
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}
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static int
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cfi_devwrite(struct cdev *dev, struct uio *uio, int ioflag)
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{
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struct cfi_softc *sc;
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u_int ofs, top;
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int error;
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sc = dev->si_drv1;
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error = (uio->uio_offset > sc->sc_size) ? EIO : 0;
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while (error == 0 && uio->uio_resid > 0 &&
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uio->uio_offset < sc->sc_size) {
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ofs = uio->uio_offset;
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/*
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* Finish the current block if we're about to write
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* to a different block.
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*/
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if (sc->sc_writing) {
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top = sc->sc_wrofs + sc->sc_wrbufsz;
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if (ofs < sc->sc_wrofs || ofs >= top)
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cfi_block_finish(sc);
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}
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/* Start writing to a (new) block if applicable. */
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if (!sc->sc_writing) {
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error = cfi_block_start(sc, uio->uio_offset);
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if (error)
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break;
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}
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top = sc->sc_wrofs + sc->sc_wrbufsz;
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error = uiomove(sc->sc_wrbuf + ofs - sc->sc_wrofs,
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MIN(top - ofs, uio->uio_resid), uio);
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}
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return (error);
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}
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static int
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cfi_devioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct thread *td)
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{
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struct cfi_softc *sc;
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struct cfiocqry *rq;
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int error;
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u_char val;
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sc = dev->si_drv1;
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error = 0;
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switch (cmd) {
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case CFIOCQRY:
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if (sc->sc_writing) {
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error = cfi_block_finish(sc);
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if (error)
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break;
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}
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rq = (struct cfiocqry *)data;
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if (rq->offset >= sc->sc_size / sc->sc_width)
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return (ESPIPE);
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if (rq->offset > ULONG_MAX - rq->count ||
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rq->offset + rq->count > sc->sc_size / sc->sc_width)
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return (ENOSPC);
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while (!error && rq->count--) {
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val = cfi_read_qry(sc, rq->offset++);
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error = copyout(&val, rq->buffer++, 1);
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}
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break;
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#ifdef CFI_SUPPORT_STRATAFLASH
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case CFIOCGFACTORYPR:
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error = cfi_intel_get_factory_pr(sc, (uint64_t *)data);
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break;
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case CFIOCGOEMPR:
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error = cfi_intel_get_oem_pr(sc, (uint64_t *)data);
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break;
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case CFIOCSOEMPR:
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error = cfi_intel_set_oem_pr(sc, *(uint64_t *)data);
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break;
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case CFIOCGPLR:
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error = cfi_intel_get_plr(sc, (uint32_t *)data);
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break;
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case CFIOCSPLR:
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error = cfi_intel_set_plr(sc);
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break;
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#endif /* CFI_SUPPORT_STRATAFLASH */
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default:
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error = ENOIOCTL;
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break;
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}
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return (error);
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}
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