Each channel gets its own DMA resources, cleanup and "bufferpool" tasks, and a separate cleanup taskqueue to isolate channels operation as much as possible to avoid various kernel panics under heavy network load. As a side-effect of this work, dpaa2_buf structure is simplified and all of the functions to re-seed those buffers are gathered now in dpaa2_buf.h and .c files; functions to work with channels are extracted into dpaa2_channel.h and .c files as well. Reported by: dch Reviewed by: bz Approved by: bz (mentor) MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D41296
558 lines
16 KiB
C
558 lines
16 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright © 2023 Dmitry Salychev
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* QBMan channel to process ingress traffic (Rx, Tx confirmation, Rx error).
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*
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* NOTE: Several WQs are organized into a single channel.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/sysctl.h>
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#include <sys/mbuf.h>
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#include <sys/taskqueue.h>
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#include <sys/sysctl.h>
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#include <sys/buf_ring.h>
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#include <sys/smp.h>
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#include <sys/proc.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/atomic.h>
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#include <machine/vmparam.h>
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#include <net/ethernet.h>
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#include <net/bpf.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_var.h>
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#include "dpaa2_types.h"
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#include "dpaa2_channel.h"
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#include "dpaa2_ni.h"
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#include "dpaa2_mc.h"
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#include "dpaa2_mc_if.h"
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#include "dpaa2_mcp.h"
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#include "dpaa2_io.h"
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#include "dpaa2_con.h"
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#include "dpaa2_buf.h"
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#include "dpaa2_swp.h"
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#include "dpaa2_swp_if.h"
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#include "dpaa2_bp.h"
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#include "dpaa2_cmd_if.h"
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MALLOC_DEFINE(M_DPAA2_CH, "dpaa2_ch", "DPAA2 QBMan Channel");
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#define RX_SEG_N (1u)
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#define RX_SEG_SZ (((MJUM9BYTES - 1) / PAGE_SIZE + 1) * PAGE_SIZE)
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#define RX_SEG_MAXSZ (((MJUM9BYTES - 1) / PAGE_SIZE + 1) * PAGE_SIZE)
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CTASSERT(RX_SEG_SZ % PAGE_SIZE == 0);
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CTASSERT(RX_SEG_MAXSZ % PAGE_SIZE == 0);
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#define TX_SEG_N (16u) /* XXX-DSL: does DPAA2 limit exist? */
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#define TX_SEG_SZ (PAGE_SIZE)
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#define TX_SEG_MAXSZ (TX_SEG_N * TX_SEG_SZ)
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CTASSERT(TX_SEG_SZ % PAGE_SIZE == 0);
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CTASSERT(TX_SEG_MAXSZ % PAGE_SIZE == 0);
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#define SGT_SEG_N (1u)
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#define SGT_SEG_SZ (PAGE_SIZE)
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#define SGT_SEG_MAXSZ (PAGE_SIZE)
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CTASSERT(SGT_SEG_SZ % PAGE_SIZE == 0);
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CTASSERT(SGT_SEG_MAXSZ % PAGE_SIZE == 0);
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static int dpaa2_chan_setup_dma(device_t, struct dpaa2_channel *, bus_size_t);
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static int dpaa2_chan_alloc_storage(device_t, struct dpaa2_channel *, bus_size_t,
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int, bus_size_t);
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static void dpaa2_chan_bp_task(void *, int);
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/**
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* @brief Сonfigures QBMan channel and registers data availability notifications.
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*/
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int
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dpaa2_chan_setup(device_t dev, device_t iodev, device_t condev, device_t bpdev,
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struct dpaa2_channel **channel, uint32_t flowid, task_fn_t cleanup_task_fn)
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{
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device_t pdev = device_get_parent(dev);
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device_t child = dev;
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struct dpaa2_ni_softc *sc = device_get_softc(dev);
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struct dpaa2_io_softc *iosc = device_get_softc(iodev);
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struct dpaa2_con_softc *consc = device_get_softc(condev);
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struct dpaa2_devinfo *rcinfo = device_get_ivars(pdev);
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struct dpaa2_devinfo *ioinfo = device_get_ivars(iodev);
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struct dpaa2_devinfo *coninfo = device_get_ivars(condev);
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struct dpaa2_con_notif_cfg notif_cfg;
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struct dpaa2_io_notif_ctx *ctx;
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struct dpaa2_channel *ch = NULL;
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struct dpaa2_cmd cmd;
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uint16_t rctk, contk;
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int error;
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DPAA2_CMD_INIT(&cmd);
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error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rctk);
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if (error) {
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device_printf(dev, "%s: failed to open DPRC: id=%d, error=%d\n",
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__func__, rcinfo->id, error);
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goto fail_rc_open;
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}
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error = DPAA2_CMD_CON_OPEN(dev, child, &cmd, coninfo->id, &contk);
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if (error) {
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device_printf(dev, "%s: failed to open DPCON: id=%d, error=%d\n",
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__func__, coninfo->id, error);
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goto fail_con_open;
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}
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error = DPAA2_CMD_CON_ENABLE(dev, child, &cmd);
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if (error) {
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device_printf(dev, "%s: failed to enable channel: dpcon_id=%d, "
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"chan_id=%d\n", __func__, coninfo->id, consc->attr.chan_id);
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goto fail_con_enable;
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}
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ch = malloc(sizeof(struct dpaa2_channel), M_DPAA2_CH, M_WAITOK | M_ZERO);
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if (ch == NULL) {
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device_printf(dev, "%s: malloc() failed\n", __func__);
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error = ENOMEM;
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goto fail_malloc;
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}
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ch->ni_dev = dev;
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ch->io_dev = iodev;
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ch->con_dev = condev;
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ch->id = consc->attr.chan_id;
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ch->flowid = flowid;
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ch->tx_frames = 0; /* for debug purposes */
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ch->tx_dropped = 0; /* for debug purposes */
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ch->store_sz = 0;
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ch->store_idx = 0;
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ch->recycled_n = 0;
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ch->rxq_n = 0;
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NET_TASK_INIT(&ch->cleanup_task, 0, cleanup_task_fn, ch);
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NET_TASK_INIT(&ch->bp_task, 0, dpaa2_chan_bp_task, ch);
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ch->cleanup_tq = taskqueue_create("dpaa2_ch cleanup", M_WAITOK,
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taskqueue_thread_enqueue, &ch->cleanup_tq);
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taskqueue_start_threads_cpuset(&ch->cleanup_tq, 1, PI_NET,
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&iosc->cpu_mask, "dpaa2_ch%d cleanup", ch->id);
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error = dpaa2_chan_setup_dma(dev, ch, sc->buf_align);
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if (error != 0) {
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device_printf(dev, "%s: failed to setup DMA\n", __func__);
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goto fail_dma_setup;
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}
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mtx_init(&ch->xmit_mtx, "dpaa2_ch_xmit", NULL, MTX_DEF);
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ch->xmit_br = buf_ring_alloc(DPAA2_TX_BUFRING_SZ, M_DEVBUF, M_NOWAIT,
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&ch->xmit_mtx);
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if (ch->xmit_br == NULL) {
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device_printf(dev, "%s: buf_ring_alloc() failed\n", __func__);
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error = ENOMEM;
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goto fail_buf_ring;
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}
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DPAA2_BUF_INIT(&ch->store);
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/* Register the new notification context */
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ctx = &ch->ctx;
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ctx->qman_ctx = (uint64_t)ctx;
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ctx->cdan_en = true;
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ctx->fq_chan_id = ch->id;
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ctx->io_dev = ch->io_dev;
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ctx->channel = ch;
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error = DPAA2_SWP_CONF_WQ_CHANNEL(ch->io_dev, ctx);
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if (error) {
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device_printf(dev, "%s: failed to register CDAN context\n",
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__func__);
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goto fail_dpcon_notif;
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}
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/* Register DPCON notification within Management Complex */
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notif_cfg.dpio_id = ioinfo->id;
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notif_cfg.prior = 0;
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notif_cfg.qman_ctx = ctx->qman_ctx;
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error = DPAA2_CMD_CON_SET_NOTIF(dev, child, &cmd, ¬if_cfg);
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if (error) {
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device_printf(dev, "%s: failed to register DPCON "
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"notifications: dpcon_id=%d, chan_id=%d\n", __func__,
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coninfo->id, consc->attr.chan_id);
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goto fail_dpcon_notif;
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}
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/* Allocate initial # of Rx buffers and a channel storage */
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error = dpaa2_buf_seed_pool(dev, bpdev, ch, DPAA2_NI_BUFS_INIT,
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DPAA2_RX_BUF_SIZE, NULL);
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if (error) {
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device_printf(dev, "%s: failed to seed buffer pool\n",
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__func__);
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goto fail_dpcon_notif;
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}
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error = dpaa2_chan_alloc_storage(dev, ch, DPAA2_ETH_STORE_SIZE,
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BUS_DMA_NOWAIT, sc->buf_align);
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if (error != 0) {
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device_printf(dev, "%s: failed to allocate channel storage\n",
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__func__);
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goto fail_dpcon_notif;
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} else {
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ch->store_sz = DPAA2_ETH_STORE_FRAMES;
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}
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/* Prepare queues for the channel */
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error = dpaa2_chan_setup_fq(dev, ch, DPAA2_NI_QUEUE_TX_CONF);
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if (error) {
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device_printf(dev, "%s: failed to prepare TxConf queue: "
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"error=%d\n", __func__, error);
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goto fail_fq_setup;
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}
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error = dpaa2_chan_setup_fq(dev, ch, DPAA2_NI_QUEUE_RX);
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if (error) {
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device_printf(dev, "%s: failed to prepare Rx queue: error=%d\n",
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__func__, error);
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goto fail_fq_setup;
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}
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if (bootverbose) {
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device_printf(dev, "channel: dpio_id=%d dpcon_id=%d chan_id=%d, "
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"priorities=%d\n", ioinfo->id, coninfo->id, ch->id,
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consc->attr.prior_num);
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}
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*channel = ch;
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(void)DPAA2_CMD_CON_CLOSE(dev, child, &cmd);
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(void)DPAA2_CMD_RC_CLOSE(dev, child, DPAA2_CMD_TK(&cmd, rctk));
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return (0);
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fail_fq_setup:
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if (ch->store.vaddr != NULL) {
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bus_dmamem_free(ch->store.dmat, ch->store.vaddr, ch->store.dmap);
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}
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if (ch->store.dmat != NULL) {
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bus_dma_tag_destroy(ch->store.dmat);
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}
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ch->store.dmat = NULL;
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ch->store.vaddr = NULL;
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ch->store.paddr = 0;
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ch->store.nseg = 0;
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fail_dpcon_notif:
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buf_ring_free(ch->xmit_br, M_DEVBUF);
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fail_buf_ring:
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mtx_destroy(&ch->xmit_mtx);
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fail_dma_setup:
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/* while (taskqueue_cancel(ch->cleanup_tq, &ch->cleanup_task, NULL)) { */
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/* taskqueue_drain(ch->cleanup_tq, &ch->cleanup_task); */
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/* } */
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/* taskqueue_free(ch->cleanup_tq); */
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fail_malloc:
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(void)DPAA2_CMD_CON_DISABLE(dev, child, DPAA2_CMD_TK(&cmd, contk));
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fail_con_enable:
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(void)DPAA2_CMD_CON_CLOSE(dev, child, DPAA2_CMD_TK(&cmd, contk));
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fail_con_open:
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(void)DPAA2_CMD_RC_CLOSE(dev, child, DPAA2_CMD_TK(&cmd, rctk));
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fail_rc_open:
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return (error);
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}
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/**
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* @brief Performs an initial configuration of the frame queue.
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*/
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int
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dpaa2_chan_setup_fq(device_t dev, struct dpaa2_channel *ch,
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enum dpaa2_ni_queue_type queue_type)
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{
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struct dpaa2_ni_softc *sc = device_get_softc(dev);
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struct dpaa2_ni_fq *fq;
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switch (queue_type) {
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case DPAA2_NI_QUEUE_TX_CONF:
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/* One queue per channel */
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fq = &ch->txc_queue;
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fq->chan = ch;
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fq->flowid = ch->flowid;
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fq->tc = 0; /* ignored */
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fq->type = queue_type;
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break;
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case DPAA2_NI_QUEUE_RX:
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KASSERT(sc->attr.num.rx_tcs <= DPAA2_MAX_TCS,
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("too many Rx traffic classes: rx_tcs=%d\n",
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sc->attr.num.rx_tcs));
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/* One queue per Rx traffic class within a channel */
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for (int i = 0; i < sc->attr.num.rx_tcs; i++) {
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fq = &ch->rx_queues[i];
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fq->chan = ch;
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fq->flowid = ch->flowid;
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fq->tc = (uint8_t) i;
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fq->type = queue_type;
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ch->rxq_n++;
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}
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break;
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case DPAA2_NI_QUEUE_RX_ERR:
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/* One queue per network interface */
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fq = &sc->rxe_queue;
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fq->chan = ch;
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fq->flowid = 0; /* ignored */
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fq->tc = 0; /* ignored */
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fq->type = queue_type;
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break;
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default:
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device_printf(dev, "%s: unexpected frame queue type: %d\n",
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__func__, queue_type);
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return (EINVAL);
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}
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return (0);
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}
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/**
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* @brief Obtain the next dequeue response from the channel storage.
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*/
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int
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dpaa2_chan_next_frame(struct dpaa2_channel *ch, struct dpaa2_dq **dq)
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{
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struct dpaa2_buf *buf = &ch->store;
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struct dpaa2_dq *msgs = (struct dpaa2_dq *)buf->vaddr;
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struct dpaa2_dq *msg = &msgs[ch->store_idx];
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int rc = EINPROGRESS;
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ch->store_idx++;
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if (msg->fdr.desc.stat & DPAA2_DQ_STAT_EXPIRED) {
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rc = EALREADY; /* VDQ command is expired */
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ch->store_idx = 0;
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if (!(msg->fdr.desc.stat & DPAA2_DQ_STAT_VALIDFRAME)) {
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msg = NULL; /* Null response, FD is invalid */
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}
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}
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if (msg != NULL && (msg->fdr.desc.stat & DPAA2_DQ_STAT_FQEMPTY)) {
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rc = ENOENT; /* FQ is empty */
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ch->store_idx = 0;
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}
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if (dq != NULL) {
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*dq = msg;
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}
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return (rc);
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}
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|
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static int
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dpaa2_chan_setup_dma(device_t dev, struct dpaa2_channel *ch,
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bus_size_t alignment)
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{
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int error;
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mtx_init(&ch->dma_mtx, "dpaa2_ch_dma_mtx", NULL, MTX_DEF);
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error = bus_dma_tag_create(
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bus_get_dma_tag(dev), /* parent */
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alignment, 0, /* alignment, boundary */
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BUS_SPACE_MAXADDR, /* low restricted addr */
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BUS_SPACE_MAXADDR, /* high restricted addr */
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NULL, NULL, /* filter, filterarg */
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RX_SEG_MAXSZ, /* maxsize */
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RX_SEG_N, /* nsegments */
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RX_SEG_SZ, /* maxsegsize */
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0, /* flags */
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NULL, /* lockfunc */
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NULL, /* lockarg */
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&ch->rx_dmat);
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if (error) {
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device_printf(dev, "%s: failed to create rx_dmat\n", __func__);
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goto fail_rx_tag;
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}
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error = bus_dma_tag_create(
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bus_get_dma_tag(dev), /* parent */
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alignment, 0, /* alignment, boundary */
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BUS_SPACE_MAXADDR, /* low restricted addr */
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BUS_SPACE_MAXADDR, /* high restricted addr */
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NULL, NULL, /* filter, filterarg */
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TX_SEG_MAXSZ, /* maxsize */
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TX_SEG_N, /* nsegments */
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TX_SEG_SZ, /* maxsegsize */
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0, /* flags */
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NULL, /* lockfunc */
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NULL, /* lockarg */
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&ch->tx_dmat);
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if (error) {
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device_printf(dev, "%s: failed to create tx_dmat\n", __func__);
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goto fail_tx_tag;
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}
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error = bus_dma_tag_create(
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bus_get_dma_tag(dev), /* parent */
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alignment, 0, /* alignment, boundary */
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BUS_SPACE_MAXADDR, /* low restricted addr */
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BUS_SPACE_MAXADDR, /* high restricted addr */
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NULL, NULL, /* filter, filterarg */
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SGT_SEG_MAXSZ, /* maxsize */
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SGT_SEG_N, /* nsegments */
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SGT_SEG_SZ, /* maxsegsize */
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0, /* flags */
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NULL, /* lockfunc */
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NULL, /* lockarg */
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&ch->sgt_dmat);
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if (error) {
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device_printf(dev, "%s: failed to create sgt_dmat\n", __func__);
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goto fail_sgt_tag;
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||
}
|
||
|
||
return (0);
|
||
|
||
fail_sgt_tag:
|
||
bus_dma_tag_destroy(ch->tx_dmat);
|
||
fail_tx_tag:
|
||
bus_dma_tag_destroy(ch->rx_dmat);
|
||
fail_rx_tag:
|
||
mtx_destroy(&ch->dma_mtx);
|
||
ch->rx_dmat = NULL;
|
||
ch->tx_dmat = NULL;
|
||
ch->sgt_dmat = NULL;
|
||
|
||
return (error);
|
||
}
|
||
|
||
/**
|
||
* @brief Allocate a DMA-mapped storage to keep responses from VDQ command.
|
||
*/
|
||
static int
|
||
dpaa2_chan_alloc_storage(device_t dev, struct dpaa2_channel *ch, bus_size_t size,
|
||
int mapflags, bus_size_t alignment)
|
||
{
|
||
struct dpaa2_buf *buf = &ch->store;
|
||
uint32_t maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE;
|
||
int error;
|
||
|
||
error = bus_dma_tag_create(
|
||
bus_get_dma_tag(dev), /* parent */
|
||
alignment, 0, /* alignment, boundary */
|
||
BUS_SPACE_MAXADDR, /* low restricted addr */
|
||
BUS_SPACE_MAXADDR, /* high restricted addr */
|
||
NULL, NULL, /* filter, filterarg */
|
||
maxsize, /* maxsize */
|
||
1, /* nsegments */
|
||
maxsize, /* maxsegsize */
|
||
BUS_DMA_ALLOCNOW, /* flags */
|
||
NULL, /* lockfunc */
|
||
NULL, /* lockarg */
|
||
&buf->dmat);
|
||
if (error != 0) {
|
||
device_printf(dev, "%s: failed to create DMA tag\n", __func__);
|
||
goto fail_tag;
|
||
}
|
||
|
||
error = bus_dmamem_alloc(buf->dmat, (void **)&buf->vaddr,
|
||
BUS_DMA_ZERO | BUS_DMA_COHERENT, &buf->dmap);
|
||
if (error != 0) {
|
||
device_printf(dev, "%s: failed to allocate storage memory\n",
|
||
__func__);
|
||
goto fail_map_create;
|
||
}
|
||
|
||
buf->paddr = 0;
|
||
error = bus_dmamap_load(buf->dmat, buf->dmap, buf->vaddr, size,
|
||
dpaa2_dmamap_oneseg_cb, &buf->paddr, mapflags);
|
||
if (error != 0) {
|
||
device_printf(dev, "%s: failed to map storage memory\n",
|
||
__func__);
|
||
goto fail_map_load;
|
||
}
|
||
|
||
bus_dmamap_sync(buf->dmat, buf->dmap,
|
||
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
|
||
|
||
buf->nseg = 1;
|
||
|
||
return (0);
|
||
|
||
fail_map_load:
|
||
bus_dmamem_free(buf->dmat, buf->vaddr, buf->dmap);
|
||
fail_map_create:
|
||
bus_dma_tag_destroy(buf->dmat);
|
||
fail_tag:
|
||
buf->dmat = NULL;
|
||
buf->vaddr = NULL;
|
||
buf->paddr = 0;
|
||
buf->nseg = 0;
|
||
|
||
return (error);
|
||
}
|
||
|
||
/**
|
||
* @brief Release new buffers to the buffer pool if necessary.
|
||
*/
|
||
static void
|
||
dpaa2_chan_bp_task(void *arg, int count)
|
||
{
|
||
struct dpaa2_channel *ch = (struct dpaa2_channel *)arg;
|
||
struct dpaa2_ni_softc *sc = device_get_softc(ch->ni_dev);
|
||
struct dpaa2_bp_softc *bpsc;
|
||
struct dpaa2_bp_conf bpconf;
|
||
const int buf_num = DPAA2_ATOMIC_READ(&sc->buf_num);
|
||
device_t bpdev;
|
||
int error;
|
||
|
||
/* There's only one buffer pool for now */
|
||
bpdev = (device_t)rman_get_start(sc->res[DPAA2_NI_BP_RID(0)]);
|
||
bpsc = device_get_softc(bpdev);
|
||
|
||
/* Get state of the buffer pool */
|
||
error = DPAA2_SWP_QUERY_BP(ch->io_dev, bpsc->attr.bpid, &bpconf);
|
||
if (error) {
|
||
device_printf(sc->dev, "%s: DPAA2_SWP_QUERY_BP() failed: "
|
||
"error=%d\n", __func__, error);
|
||
return;
|
||
}
|
||
|
||
/* Double allocated Rx buffers if amount of free buffers is < 25% */
|
||
if (bpconf.free_bufn < (buf_num >> 2)) {
|
||
mtx_assert(&ch->dma_mtx, MA_NOTOWNED);
|
||
mtx_lock(&ch->dma_mtx);
|
||
(void)dpaa2_buf_seed_pool(ch->ni_dev, bpdev, ch, buf_num,
|
||
DPAA2_RX_BUF_SIZE, &ch->dma_mtx);
|
||
mtx_unlock(&ch->dma_mtx);
|
||
|
||
DPAA2_ATOMIC_XCHG(&sc->buf_free, bpconf.free_bufn);
|
||
}
|
||
}
|