DPAA2 is a hardware-level networking architecture found in some NXP SoCs which contain hardware blocks including Management Complex (MC, a command interface to manipulate DPAA2 objects), Wire Rate I/O processor (WRIOP, packets distribution, queuing, drop decisions), Queues and Buffers Manager (QBMan, Rx/Tx queues control, Rx buffer pools) and the others. The Management Complex runs NXP-supplied firmware which provides DPAA2 objects as an abstraction layer over those blocks to simplify an access to the underlying hardware. Each DPAA2 object has its own driver (to perform an initialization at least) and will be visible as a separate device in the device tree. Two new drivers (dpaa2_mc and dpaa2_rc) act like firmware buses in order to form a hierarchy of the DPAA2 devices: acpiX (or simplebusX) dpaa2_mcX dpaa2_rcX dpaa2_mcp0 ... dpaa2_mcpN dpaa2_bpX dpaa2_macX dpaa2_io0 ... dpaa2_ioM dpaa2_niX dpaa2_mc is suppossed to be a root of the hierarchy, comes in ACPI and FDT flavours and implements helper interfaces to allocate and assign bus resources, MSI and "managed" DPAA2 devices (NXP treats some of the objects as resources for the other DPAA2 objects to let them function properly). Almost all of the DPAA2 objects are assigned to the resource containers (dpaa2_rc) to implement isolation. The initial implementation focuses on the DPAA2 network interface to be operational. It is the most complex object in terms of dependencies which uses I/O objects to transmit/receive packets. Approved by: bz (mentor) Tested by: manu, bz MFC after: 3 months Differential Revision: https://reviews.freebsd.org/D36638
219 lines
7.0 KiB
C
219 lines
7.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright © 2021-2022 Dmitry Salychev
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _DPAA2_MC_H
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#define _DPAA2_MC_H
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#include <sys/rman.h>
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#include <sys/bus.h>
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#include <sys/queue.h>
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#include <net/ethernet.h>
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#include <dev/ofw/openfirm.h>
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#include "pci_if.h"
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#include "dpaa2_types.h"
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#include "dpaa2_mcp.h"
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#include "dpaa2_swp.h"
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#include "dpaa2_ni.h"
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#include "dpaa2_io.h"
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#include "dpaa2_mac.h"
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#include "dpaa2_con.h"
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#include "dpaa2_bp.h"
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/*
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* Maximum number of MSIs supported by the MC for its children without IOMMU.
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*
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* TODO: Should be much more with IOMMU translation.
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*/
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#define DPAA2_MC_MSI_COUNT 32
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/* Flags for DPAA2 devices as resources. */
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#define DPAA2_MC_DEV_ALLOCATABLE 0x01u /* to be managed by DPAA2-specific rman */
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#define DPAA2_MC_DEV_ASSOCIATED 0x02u /* to obtain info about DPAA2 device */
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#define DPAA2_MC_DEV_SHAREABLE 0x04u /* to be shared among DPAA2 devices */
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struct dpaa2_mc_devinfo; /* about managed DPAA2 devices */
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/**
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* @brief Software context for the DPAA2 Management Complex (MC) driver.
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*
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* dev: Device associated with this software context.
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* rcdev: Child device associated with the root resource container.
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* acpi_based: Attached using ACPI (true) or FDT (false).
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* ofw_node: FDT node of the Management Complex (acpi_based == false).
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*
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* res: Unmapped MC command portal and control registers resources.
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* map: Mapped MC command portal and control registers resources.
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*
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* dpio_rman: I/O objects resource manager.
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* dpbp_rman: Buffer Pools resource manager.
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* dpcon_rman: Concentrators resource manager.
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* dpmcp_rman: MC portals resource manager.
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*/
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struct dpaa2_mc_softc {
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device_t dev;
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device_t rcdev;
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bool acpi_based;
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phandle_t ofw_node;
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struct resource *res[2];
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struct resource_map map[2];
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/* For allocatable managed DPAA2 objects. */
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struct rman dpio_rman;
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struct rman dpbp_rman;
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struct rman dpcon_rman;
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struct rman dpmcp_rman;
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/* For managed DPAA2 objects. */
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struct mtx mdev_lock;
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STAILQ_HEAD(, dpaa2_mc_devinfo) mdev_list;
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/* NOTE: Workaround in case of no IOMMU available. */
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#ifndef IOMMU
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device_t msi_owner;
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bool msi_allocated;
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struct mtx msi_lock;
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struct {
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device_t child;
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int irq;
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} msi[DPAA2_MC_MSI_COUNT];
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#endif
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};
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/**
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* @brief Software context for the DPAA2 Resource Container (RC) driver.
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*
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* dev: Device associated with this software context.
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* portal: Helper object to send commands to the MC portal.
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* unit: Helps to distinguish between root (0) and child DRPCs.
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* cont_id: Container ID.
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*/
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struct dpaa2_rc_softc {
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device_t dev;
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int unit;
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uint32_t cont_id;
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};
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/**
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* @brief Information about MSI messages supported by the DPAA2 object.
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*
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* msi_msgnum: Number of MSI messages supported by the DPAA2 object.
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* msi_alloc: Number of MSI messages allocated for the DPAA2 object.
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* msi_handlers: Number of MSI message handlers configured.
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*/
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struct dpaa2_msinfo {
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uint8_t msi_msgnum;
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uint8_t msi_alloc;
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uint32_t msi_handlers;
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};
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/**
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* @brief Information about DPAA2 device.
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*
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* pdev: Parent device.
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* dev: Device this devinfo is associated with.
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*
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* id: ID of a logical DPAA2 object resource.
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* portal_id: ID of the MC portal which belongs to the object's container.
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* icid: Isolation context ID of the DPAA2 object. It is shared
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* between a resource container and all of its children.
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*
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* dtype: Type of the DPAA2 object.
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* resources: Resources available for this DPAA2 device.
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* msi: Information about MSI messages supported by the DPAA2 object.
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*/
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struct dpaa2_devinfo {
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device_t pdev;
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device_t dev;
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uint32_t id;
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uint32_t portal_id;
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uint32_t icid;
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enum dpaa2_dev_type dtype;
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struct resource_list resources;
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struct dpaa2_msinfo msi;
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/*
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* DPAA2 object might or might not have its own portal allocated to
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* execute MC commands. If the portal has been allocated, it takes
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* precedence over the portal owned by the resource container.
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*/
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struct dpaa2_mcp *portal;
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};
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DECLARE_CLASS(dpaa2_mc_driver);
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/* For device interface. */
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int dpaa2_mc_attach(device_t dev);
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int dpaa2_mc_detach(device_t dev);
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/* For bus interface. */
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struct resource * dpaa2_mc_alloc_resource(device_t mcdev, device_t child,
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int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
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u_int flags);
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int dpaa2_mc_adjust_resource(device_t mcdev, device_t child, int type,
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struct resource *r, rman_res_t start, rman_res_t end);
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int dpaa2_mc_release_resource(device_t mcdev, device_t child, int type,
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int rid, struct resource *r);
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int dpaa2_mc_activate_resource(device_t mcdev, device_t child, int type,
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int rid, struct resource *r);
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int dpaa2_mc_deactivate_resource(device_t mcdev, device_t child, int type,
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int rid, struct resource *r);
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/* For pseudo-pcib interface. */
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int dpaa2_mc_alloc_msi(device_t mcdev, device_t child, int count, int maxcount,
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int *irqs);
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int dpaa2_mc_release_msi(device_t mcdev, device_t child, int count, int *irqs);
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int dpaa2_mc_map_msi(device_t mcdev, device_t child, int irq, uint64_t *addr,
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uint32_t *data);
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int dpaa2_mc_get_id(device_t mcdev, device_t child, enum pci_id_type type,
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uintptr_t *id);
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/* For DPAA2 MC bus interface. */
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int dpaa2_mc_manage_dev(device_t mcdev, device_t dpaa2_dev, uint32_t flags);
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int dpaa2_mc_get_free_dev(device_t mcdev, device_t *dpaa2_dev,
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enum dpaa2_dev_type devtype);
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int dpaa2_mc_get_dev(device_t mcdev, device_t *dpaa2_dev,
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enum dpaa2_dev_type devtype, uint32_t obj_id);
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int dpaa2_mc_get_shared_dev(device_t mcdev, device_t *dpaa2_dev,
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enum dpaa2_dev_type devtype);
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int dpaa2_mc_reserve_dev(device_t mcdev, device_t dpaa2_dev,
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enum dpaa2_dev_type devtype);
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int dpaa2_mc_release_dev(device_t mcdev, device_t dpaa2_dev,
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enum dpaa2_dev_type devtype);
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#endif /* _DPAA2_MC_H */
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