115 lines
3.1 KiB
C
115 lines
3.1 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com>
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*
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* This work was supported by Innovate UK project 105694, "Digital Security
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* by Design (DSbD) Technology Platform Prototype".
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ARM64_SCMI_SCMI_CLK_H_
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#define _ARM64_SCMI_SCMI_CLK_H_
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/*
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* SCMI Clock Protocol
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*/
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struct scmi_clk_protocol_attrs_out {
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int32_t status;
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uint32_t attributes;
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#define CLK_ATTRS_NCLOCKS_S 0
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#define CLK_ATTRS_NCLOCKS_M (0xffff << CLK_ATTRS_NCLOCKS_S)
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};
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struct scmi_clk_attrs_in {
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uint32_t clock_id;
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};
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struct scmi_clk_attrs_out {
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int32_t status;
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uint32_t attributes;
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#define CLK_ATTRS_RATE_CHANGE_NOTIFY_SUPP (1 << 31)
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#define CLK_ATTRS_RATE_REQ_CHANGE_NOTIFY_SUPP (1 << 30)
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#define CLK_ATTRS_EXT_CLK_NAME (1 << 29)
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#define CLK_ATTRS_ENABLED (1 << 0)
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uint8_t clock_name[16]; /* only if attrs bit 29 unset */
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uint32_t clock_enable_delay; /* worst case */
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};
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struct scmi_clk_name_get_in {
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uint32_t clock_id;
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};
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struct scmi_clk_name_get_out {
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int32_t status;
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uint32_t flags;
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uint8_t name[64];
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};
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enum scmi_clock_message_id {
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SCMI_CLOCK_ATTRIBUTES = 0x3,
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SCMI_CLOCK_RATE_SET = 0x5,
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SCMI_CLOCK_RATE_GET = 0x6,
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SCMI_CLOCK_CONFIG_SET = 0x7,
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SCMI_CLOCK_NAME_GET = 0x8,
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};
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#define SCMI_CLK_RATE_ASYNC_NOTIFY (1 << 0)
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#define SCMI_CLK_RATE_ASYNC_NORESP (1 << 0 | 1 << 1)
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#define SCMI_CLK_RATE_ROUND_DOWN 0
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#define SCMI_CLK_RATE_ROUND_UP (1 << 2)
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#define SCMI_CLK_RATE_ROUND_CLOSEST (1 << 3)
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struct scmi_clk_state_in {
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uint32_t clock_id;
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uint32_t attributes;
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};
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struct scmi_clk_state_out {
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int32_t status;
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};
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struct scmi_clk_rate_get_in {
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uint32_t clock_id;
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};
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struct scmi_clk_rate_get_out {
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int32_t status;
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uint32_t rate_lsb;
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uint32_t rate_msb;
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};
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struct scmi_clk_rate_set_in {
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uint32_t flags;
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uint32_t clock_id;
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uint32_t rate_lsb;
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uint32_t rate_msb;
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};
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struct scmi_clk_rate_set_out {
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int32_t status;
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};
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#endif /* !_ARM64_SCMI_SCMI_CLK_H_ */
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