240 lines
6.5 KiB
C
240 lines
6.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Rubicon Communications, LLC (Netgate)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/mii/mii_bitbang.h>
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#include <dev/mii/miivar.h>
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#include <dev/ofw/ofw_bus.h>
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#include "gpiobus_if.h"
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#include "miibus_if.h"
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#define GPIOMDIO_MDC_DFLT 0
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#define GPIOMDIO_MDIO_DFLT 1
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#define GPIOMDIO_MIN_PINS 2
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#define MDO_BIT 0x01
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#define MDI_BIT 0x02
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#define MDC_BIT 0x04
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#define MDIRPHY_BIT 0x08
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#define MDIRHOST_BIT 0x10
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#define MDO sc->miibb_ops.mbo_bits[MII_BIT_MDO]
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#define MDI sc->miibb_ops.mbo_bits[MII_BIT_MDI]
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#define MDC sc->miibb_ops.mbo_bits[MII_BIT_MDC]
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#define MDIRPHY sc->miibb_ops.mbo_bits[MII_BIT_DIR_HOST_PHY]
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#define MDIRHOST sc->miibb_ops.mbo_bits[MII_BIT_DIR_PHY_HOST]
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static uint32_t gpiomdio_bb_read(device_t);
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static void gpiomdio_bb_write(device_t, uint32_t);
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struct gpiomdio_softc
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{
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device_t sc_dev;
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device_t sc_busdev;
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int mdc_pin;
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int mdio_pin;
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struct mii_bitbang_ops miibb_ops;
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};
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static int
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gpiomdio_probe(device_t dev)
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{
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struct gpiobus_ivar *devi;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "freebsd,gpiomdio"))
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return (ENXIO);
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devi = GPIOBUS_IVAR(dev);
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if (devi->npins < GPIOMDIO_MIN_PINS) {
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device_printf(dev,
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"gpiomdio needs at least %d GPIO pins (only %d given).\n",
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GPIOMDIO_MIN_PINS, devi->npins);
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return (ENXIO);
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}
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device_set_desc(dev, "GPIO MDIO bit-banging Bus driver");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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gpiomdio_attach(device_t dev)
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{
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phandle_t node;
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pcell_t pin;
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struct gpiobus_ivar *devi;
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struct gpiomdio_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_busdev = device_get_parent(dev);
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if ((node = ofw_bus_get_node(dev)) == -1)
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return (ENXIO);
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if (OF_getencprop(node, "mdc", &pin, sizeof(pin)) > 0)
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sc->mdc_pin = (int)pin;
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if (OF_getencprop(node, "mdio", &pin, sizeof(pin)) > 0)
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sc->mdio_pin = (int)pin;
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if (sc->mdc_pin < 0 || sc->mdc_pin > 1)
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sc->mdc_pin = GPIOMDIO_MDC_DFLT;
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if (sc->mdio_pin < 0 || sc->mdio_pin > 1)
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sc->mdio_pin = GPIOMDIO_MDIO_DFLT;
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devi = GPIOBUS_IVAR(dev);
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device_printf(dev, "MDC pin: %d, MDIO pin: %d\n",
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devi->pins[sc->mdc_pin], devi->pins[sc->mdio_pin]);
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/* Initialize mii_bitbang_ops. */
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MDO = MDO_BIT;
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MDI = MDI_BIT;
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MDC = MDC_BIT;
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MDIRPHY = MDIRPHY_BIT;
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MDIRHOST = MDIRHOST_BIT;
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sc->miibb_ops.mbo_read = gpiomdio_bb_read;
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sc->miibb_ops.mbo_write = gpiomdio_bb_write;
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/* Register our MDIO Bus device. */
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OF_device_register_xref(OF_xref_from_node(node), dev);
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return (0);
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}
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static uint32_t
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gpiomdio_bb_read(device_t dev)
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{
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struct gpiomdio_softc *sc;
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unsigned int val;
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sc = device_get_softc(dev);
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GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, sc->mdio_pin, &val);
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return (val != 0 ? MDI_BIT : 0);
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}
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static void
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gpiomdio_bb_write(device_t dev, uint32_t val)
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{
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struct gpiomdio_softc *sc;
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sc = device_get_softc(dev);
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/* Set the data pin state. */
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if ((val & (MDIRPHY_BIT | MDO_BIT)) == (MDIRPHY_BIT | MDO_BIT))
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GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, sc->mdio_pin, 1);
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else if ((val & (MDIRPHY_BIT | MDO_BIT)) == MDIRPHY_BIT)
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GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, sc->mdio_pin, 0);
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if (val & MDIRPHY_BIT)
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GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->mdio_pin,
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GPIO_PIN_OUTPUT);
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else if (val & MDIRHOST_BIT)
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GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->mdio_pin,
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GPIO_PIN_INPUT);
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/* And now the clock state. */
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if (val & MDC_BIT)
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GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, sc->mdc_pin, 1);
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else
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GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, sc->mdc_pin, 0);
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GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->mdc_pin,
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GPIO_PIN_OUTPUT);
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}
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static int
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gpiomdio_readreg(device_t dev, int phy, int reg)
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{
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struct gpiomdio_softc *sc;
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sc = device_get_softc(dev);
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return (mii_bitbang_readreg(dev, &sc->miibb_ops, phy, reg));
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}
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static int
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gpiomdio_writereg(device_t dev, int phy, int reg, int val)
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{
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struct gpiomdio_softc *sc;
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sc = device_get_softc(dev);
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mii_bitbang_writereg(dev, &sc->miibb_ops, phy, reg, val);
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return (0);
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}
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static phandle_t
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gpiomdio_get_node(device_t bus, device_t dev)
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{
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return (ofw_bus_get_node(bus));
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}
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static device_method_t gpiomdio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, gpiomdio_probe),
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DEVMETHOD(device_attach, gpiomdio_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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/* MDIO interface */
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DEVMETHOD(miibus_readreg, gpiomdio_readreg),
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DEVMETHOD(miibus_writereg, gpiomdio_writereg),
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/* OFW bus interface */
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DEVMETHOD(ofw_bus_get_node, gpiomdio_get_node),
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DEVMETHOD_END
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};
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static driver_t gpiomdio_driver = {
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"gpiomdio",
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gpiomdio_methods,
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sizeof(struct gpiomdio_softc),
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};
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EARLY_DRIVER_MODULE(gpiomdio, gpiobus, gpiomdio_driver, 0, 0,
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BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
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DRIVER_MODULE(miibus, gpiomdio, miibus_driver, 0, 0);
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MODULE_DEPEND(gpiomdio, gpiobus, 1, 1, 1);
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MODULE_DEPEND(gpiomdio, miibus, 1, 1, 1);
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MODULE_DEPEND(gpiomdio, mii_bitbang, 1, 1, 1);
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