840 lines
20 KiB
C
840 lines
20 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 1999,2000 Jonathan Lemon
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* All rights reserved.
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*
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# Derived from the original IDA Compaq RAID driver, which is
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* Copyright (c) 1996, 1997, 1998, 1999
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* Mark Dawson and David James. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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/*
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* Generic driver for Compaq SMART RAID adapters.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/stat.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/endian.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <geom/geom_disk.h>
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#include <dev/ida/idareg.h>
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#include <dev/ida/idavar.h>
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#include <dev/ida/idaio.h>
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/* prototypes */
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static int ida_alloc_qcbs(struct ida_softc *ida);
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static void ida_done(struct ida_softc *ida, struct ida_qcb *qcb);
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static void ida_start(struct ida_softc *ida);
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static void ida_startio(struct ida_softc *ida);
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static void ida_startup(void *arg);
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static void ida_timeout(void *arg);
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static int ida_wait(struct ida_softc *ida, struct ida_qcb *qcb);
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static d_ioctl_t ida_ioctl;
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static struct cdevsw ida_cdevsw = {
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.d_version = D_VERSION,
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.d_ioctl = ida_ioctl,
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.d_name = "ida",
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};
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void
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ida_free(struct ida_softc *ida)
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{
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int i;
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if (ida->ih != NULL)
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bus_teardown_intr(ida->dev, ida->irq, ida->ih);
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mtx_lock(&ida->lock);
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callout_stop(&ida->ch);
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mtx_unlock(&ida->lock);
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callout_drain(&ida->ch);
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if (ida->buffer_dmat) {
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for (i = 0; i < IDA_QCB_MAX; i++)
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bus_dmamap_destroy(ida->buffer_dmat, ida->qcbs[i].dmamap);
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bus_dma_tag_destroy(ida->buffer_dmat);
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}
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if (ida->hwqcb_dmat) {
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if (ida->hwqcb_busaddr)
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bus_dmamap_unload(ida->hwqcb_dmat, ida->hwqcb_dmamap);
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if (ida->hwqcbs)
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bus_dmamem_free(ida->hwqcb_dmat, ida->hwqcbs,
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ida->hwqcb_dmamap);
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bus_dma_tag_destroy(ida->hwqcb_dmat);
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}
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if (ida->qcbs != NULL)
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free(ida->qcbs, M_DEVBUF);
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if (ida->irq != NULL)
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bus_release_resource(ida->dev, ida->irq_res_type,
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0, ida->irq);
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if (ida->parent_dmat != NULL)
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bus_dma_tag_destroy(ida->parent_dmat);
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if (ida->regs != NULL)
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bus_release_resource(ida->dev, ida->regs_res_type,
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ida->regs_res_id, ida->regs);
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mtx_destroy(&ida->lock);
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}
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/*
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* record bus address from bus_dmamap_load
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*/
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static void
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ida_dma_map_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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bus_addr_t *baddr;
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baddr = (bus_addr_t *)arg;
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*baddr = segs->ds_addr;
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}
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static __inline struct ida_qcb *
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ida_get_qcb(struct ida_softc *ida)
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{
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struct ida_qcb *qcb;
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if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) {
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SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
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bzero(qcb->hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
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}
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return (qcb);
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}
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static __inline void
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ida_free_qcb(struct ida_softc *ida, struct ida_qcb *qcb)
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{
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qcb->state = QCB_FREE;
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qcb->buf = NULL;
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qcb->error = 0;
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SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
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}
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static __inline bus_addr_t
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idahwqcbvtop(struct ida_softc *ida, struct ida_hardware_qcb *hwqcb)
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{
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return (ida->hwqcb_busaddr +
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((bus_addr_t)hwqcb - (bus_addr_t)ida->hwqcbs));
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}
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static __inline struct ida_qcb *
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idahwqcbptov(struct ida_softc *ida, bus_addr_t hwqcb_addr)
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{
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struct ida_hardware_qcb *hwqcb;
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hwqcb = (struct ida_hardware_qcb *)
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((bus_addr_t)ida->hwqcbs + (hwqcb_addr - ida->hwqcb_busaddr));
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return (hwqcb->qcb);
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}
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static int
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ida_alloc_qcbs(struct ida_softc *ida)
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{
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struct ida_qcb *qcb;
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int error, i;
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for (i = 0; i < IDA_QCB_MAX; i++) {
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qcb = &ida->qcbs[i];
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error = bus_dmamap_create(ida->buffer_dmat, /*flags*/0, &qcb->dmamap);
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if (error != 0)
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return (error);
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qcb->ida = ida;
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qcb->flags = QCB_FREE;
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qcb->hwqcb = &ida->hwqcbs[i];
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qcb->hwqcb->qcb = qcb;
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qcb->hwqcb_busaddr = idahwqcbvtop(ida, qcb->hwqcb);
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SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
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}
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return (0);
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}
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int
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ida_setup(struct ida_softc *ida)
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{
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struct ida_controller_info cinfo;
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device_t child;
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int error, i, unit;
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SLIST_INIT(&ida->free_qcbs);
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STAILQ_INIT(&ida->qcb_queue);
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bioq_init(&ida->bio_queue);
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ida->qcbs = (struct ida_qcb *)
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malloc(IDA_QCB_MAX * sizeof(struct ida_qcb), M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (ida->qcbs == NULL)
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return (ENOMEM);
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/*
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* Create our DMA tags
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*/
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/* DMA tag for our hardware QCB structures */
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error = bus_dma_tag_create(
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/* parent */ ida->parent_dmat,
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/* alignment */ 1,
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/* boundary */ 0,
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/* lowaddr */ BUS_SPACE_MAXADDR,
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/* highaddr */ BUS_SPACE_MAXADDR,
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/* filter */ NULL,
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/* filterarg */ NULL,
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/* maxsize */ IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
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/* nsegments */ 1,
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/* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
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/* flags */ 0,
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/* lockfunc */ NULL,
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/* lockarg */ NULL,
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&ida->hwqcb_dmat);
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if (error)
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return (ENOMEM);
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/* DMA tag for mapping buffers into device space */
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error = bus_dma_tag_create(
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/* parent */ ida->parent_dmat,
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/* alignment */ 1,
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/* boundary */ 0,
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/* lowaddr */ BUS_SPACE_MAXADDR,
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/* highaddr */ BUS_SPACE_MAXADDR,
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/* filter */ NULL,
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/* filterarg */ NULL,
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/* maxsize */ DFLTPHYS,
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/* nsegments */ IDA_NSEG,
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/* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
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/* flags */ 0,
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/* lockfunc */ busdma_lock_mutex,
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/* lockarg */ &ida->lock,
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&ida->buffer_dmat);
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if (error)
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return (ENOMEM);
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/* Allocation of hardware QCBs */
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/* XXX allocation is rounded to hardware page size */
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error = bus_dmamem_alloc(ida->hwqcb_dmat,
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(void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
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if (error)
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return (ENOMEM);
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/* And permanently map them in */
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bus_dmamap_load(ida->hwqcb_dmat, ida->hwqcb_dmamap,
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ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
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ida_dma_map_cb, &ida->hwqcb_busaddr, /*flags*/0);
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bzero(ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb));
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error = ida_alloc_qcbs(ida);
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if (error)
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return (error);
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mtx_lock(&ida->lock);
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ida->cmd.int_enable(ida, 0);
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error = ida_command(ida, CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo),
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IDA_CONTROLLER, 0, DMA_DATA_IN);
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if (error) {
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mtx_unlock(&ida->lock);
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device_printf(ida->dev, "CMD_GET_CTRL_INFO failed.\n");
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return (error);
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}
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device_printf(ida->dev, "drives=%d firm_rev=%c%c%c%c\n",
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cinfo.num_drvs, cinfo.firm_rev[0], cinfo.firm_rev[1],
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cinfo.firm_rev[2], cinfo.firm_rev[3]);
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if (ida->flags & IDA_FIRMWARE) {
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int data;
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error = ida_command(ida, CMD_START_FIRMWARE,
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&data, sizeof(data), IDA_CONTROLLER, 0, DMA_DATA_IN);
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if (error) {
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mtx_unlock(&ida->lock);
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device_printf(ida->dev, "CMD_START_FIRMWARE failed.\n");
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return (error);
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}
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}
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ida->cmd.int_enable(ida, 1);
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ida->flags |= IDA_ATTACHED;
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mtx_unlock(&ida->lock);
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for (i = 0; i < cinfo.num_drvs; i++) {
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child = device_add_child(ida->dev, /*"idad"*/NULL, -1);
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if (child != NULL)
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device_set_ivars(child, (void *)(intptr_t)i);
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}
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ida->ich.ich_func = ida_startup;
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ida->ich.ich_arg = ida;
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if (config_intrhook_establish(&ida->ich) != 0) {
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device_delete_children(ida->dev);
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device_printf(ida->dev, "Cannot establish configuration hook\n");
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return (error);
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}
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unit = device_get_unit(ida->dev);
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ida->ida_dev_t = make_dev(&ida_cdevsw, unit,
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UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR,
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"ida%d", unit);
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ida->ida_dev_t->si_drv1 = ida;
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return (0);
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}
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static void
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ida_startup(void *arg)
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{
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struct ida_softc *ida;
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ida = arg;
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config_intrhook_disestablish(&ida->ich);
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bus_topo_lock();
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bus_generic_attach(ida->dev);
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bus_topo_unlock();
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}
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int
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ida_detach(device_t dev)
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{
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struct ida_softc *ida;
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int error;
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ida = (struct ida_softc *)device_get_softc(dev);
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error = bus_generic_detach(dev);
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if (error)
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return (error);
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error = device_delete_children(dev);
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if (error)
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return (error);
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/*
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* XXX
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* before detaching, we must make sure that the system is
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* quiescent; nothing mounted, no pending activity.
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*/
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/*
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* XXX
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* now, how are we supposed to maintain a list of our drives?
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* iterate over our "child devices"?
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*/
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destroy_dev(ida->ida_dev_t);
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ida_free(ida);
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return (error);
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}
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static void
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ida_data_cb(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
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{
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struct ida_hardware_qcb *hwqcb;
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struct ida_softc *ida;
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struct ida_qcb *qcb;
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bus_dmasync_op_t op;
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int i;
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qcb = arg;
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ida = qcb->ida;
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if (!dumping)
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mtx_assert(&ida->lock, MA_OWNED);
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if (error) {
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qcb->error = error;
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ida_done(ida, qcb);
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return;
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}
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hwqcb = qcb->hwqcb;
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hwqcb->hdr.size = htole16((sizeof(struct ida_req) +
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sizeof(struct ida_sgb) * IDA_NSEG) >> 2);
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for (i = 0; i < nsegments; i++) {
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hwqcb->seg[i].addr = htole32(segs[i].ds_addr);
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hwqcb->seg[i].length = htole32(segs[i].ds_len);
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}
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hwqcb->req.sgcount = nsegments;
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if (qcb->flags & DMA_DATA_TRANSFER) {
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switch (qcb->flags & DMA_DATA_TRANSFER) {
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case DMA_DATA_TRANSFER:
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op = BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE;
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break;
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case DMA_DATA_IN:
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op = BUS_DMASYNC_PREREAD;
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break;
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default:
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KASSERT((qcb->flags & DMA_DATA_TRANSFER) ==
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DMA_DATA_OUT, ("bad DMA data flags"));
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op = BUS_DMASYNC_PREWRITE;
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break;
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}
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bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
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}
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bus_dmamap_sync(ida->hwqcb_dmat, ida->hwqcb_dmamap,
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BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
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STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
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ida_start(ida);
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ida->flags &= ~IDA_QFROZEN;
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}
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static int
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ida_map_qcb(struct ida_softc *ida, struct ida_qcb *qcb, void *data,
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bus_size_t datasize)
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{
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int error, flags;
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if (ida->flags & IDA_INTERRUPTS)
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flags = BUS_DMA_WAITOK;
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else
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flags = BUS_DMA_NOWAIT;
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error = bus_dmamap_load(ida->buffer_dmat, qcb->dmamap, data, datasize,
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ida_data_cb, qcb, flags);
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if (error == EINPROGRESS) {
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ida->flags |= IDA_QFROZEN;
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error = 0;
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}
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return (error);
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}
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int
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ida_command(struct ida_softc *ida, int command, void *data, int datasize,
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int drive, u_int32_t pblkno, int flags)
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{
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struct ida_hardware_qcb *hwqcb;
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struct ida_qcb *qcb;
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int error;
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if (!dumping)
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mtx_assert(&ida->lock, MA_OWNED);
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qcb = ida_get_qcb(ida);
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if (qcb == NULL) {
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device_printf(ida->dev, "out of QCBs\n");
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return (EAGAIN);
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}
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qcb->flags = flags | IDA_COMMAND;
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hwqcb = qcb->hwqcb;
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hwqcb->hdr.drive = drive;
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hwqcb->req.blkno = htole32(pblkno);
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hwqcb->req.bcount = htole16(howmany(datasize, DEV_BSIZE));
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hwqcb->req.command = command;
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error = ida_map_qcb(ida, qcb, data, datasize);
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if (error == 0) {
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error = ida_wait(ida, qcb);
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/* Don't free QCB on a timeout in case it later completes. */
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if (error)
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return (error);
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error = qcb->error;
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}
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/* XXX should have status returned here? */
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/* XXX have "status pointer" area in QCB? */
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ida_free_qcb(ida, qcb);
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return (error);
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}
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void
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ida_submit_buf(struct ida_softc *ida, struct bio *bp)
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{
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mtx_lock(&ida->lock);
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bioq_insert_tail(&ida->bio_queue, bp);
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ida_startio(ida);
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mtx_unlock(&ida->lock);
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}
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static void
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ida_startio(struct ida_softc *ida)
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{
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struct ida_hardware_qcb *hwqcb;
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struct ida_qcb *qcb;
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struct idad_softc *drv;
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struct bio *bp;
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int error;
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mtx_assert(&ida->lock, MA_OWNED);
|
|
for (;;) {
|
|
if (ida->flags & IDA_QFROZEN)
|
|
return;
|
|
bp = bioq_first(&ida->bio_queue);
|
|
if (bp == NULL)
|
|
return; /* no more buffers */
|
|
|
|
qcb = ida_get_qcb(ida);
|
|
if (qcb == NULL)
|
|
return; /* out of resources */
|
|
|
|
bioq_remove(&ida->bio_queue, bp);
|
|
qcb->buf = bp;
|
|
qcb->flags = bp->bio_cmd == BIO_READ ? DMA_DATA_IN : DMA_DATA_OUT;
|
|
|
|
hwqcb = qcb->hwqcb;
|
|
drv = bp->bio_driver1;
|
|
hwqcb->hdr.drive = drv->drive;
|
|
hwqcb->req.blkno = bp->bio_pblkno;
|
|
hwqcb->req.bcount = howmany(bp->bio_bcount, DEV_BSIZE);
|
|
hwqcb->req.command = bp->bio_cmd == BIO_READ ? CMD_READ : CMD_WRITE;
|
|
|
|
error = ida_map_qcb(ida, qcb, bp->bio_data, bp->bio_bcount);
|
|
if (error) {
|
|
qcb->error = error;
|
|
ida_done(ida, qcb);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
ida_start(struct ida_softc *ida)
|
|
{
|
|
struct ida_qcb *qcb;
|
|
|
|
if (!dumping)
|
|
mtx_assert(&ida->lock, MA_OWNED);
|
|
while ((qcb = STAILQ_FIRST(&ida->qcb_queue)) != NULL) {
|
|
if (ida->cmd.fifo_full(ida))
|
|
break;
|
|
STAILQ_REMOVE_HEAD(&ida->qcb_queue, link.stqe);
|
|
/*
|
|
* XXX
|
|
* place the qcb on an active list?
|
|
*/
|
|
|
|
/* Set a timeout. */
|
|
if (!ida->qactive && !dumping)
|
|
callout_reset(&ida->ch, hz * 5, ida_timeout, ida);
|
|
ida->qactive++;
|
|
|
|
qcb->state = QCB_ACTIVE;
|
|
ida->cmd.submit(ida, qcb);
|
|
}
|
|
}
|
|
|
|
static int
|
|
ida_wait(struct ida_softc *ida, struct ida_qcb *qcb)
|
|
{
|
|
struct ida_qcb *qcb_done = NULL;
|
|
bus_addr_t completed;
|
|
int delay;
|
|
|
|
if (!dumping)
|
|
mtx_assert(&ida->lock, MA_OWNED);
|
|
if (ida->flags & IDA_INTERRUPTS) {
|
|
if (mtx_sleep(qcb, &ida->lock, PRIBIO, "idacmd", 5 * hz)) {
|
|
qcb->state = QCB_TIMEDOUT;
|
|
return (ETIMEDOUT);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
again:
|
|
delay = 5 * 1000 * 100; /* 5 sec delay */
|
|
while ((completed = ida->cmd.done(ida)) == 0) {
|
|
if (delay-- == 0) {
|
|
qcb->state = QCB_TIMEDOUT;
|
|
return (ETIMEDOUT);
|
|
}
|
|
DELAY(10);
|
|
}
|
|
|
|
qcb_done = idahwqcbptov(ida, completed & ~3);
|
|
if (qcb_done != qcb)
|
|
goto again;
|
|
ida_done(ida, qcb);
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
ida_intr(void *data)
|
|
{
|
|
struct ida_softc *ida;
|
|
struct ida_qcb *qcb;
|
|
bus_addr_t completed;
|
|
|
|
ida = (struct ida_softc *)data;
|
|
|
|
mtx_lock(&ida->lock);
|
|
if (ida->cmd.int_pending(ida) == 0) {
|
|
mtx_unlock(&ida->lock);
|
|
return; /* not our interrupt */
|
|
}
|
|
|
|
while ((completed = ida->cmd.done(ida)) != 0) {
|
|
qcb = idahwqcbptov(ida, completed & ~3);
|
|
|
|
if (qcb == NULL || qcb->state != QCB_ACTIVE) {
|
|
device_printf(ida->dev,
|
|
"ignoring completion %jx\n", (intmax_t)completed);
|
|
continue;
|
|
}
|
|
/* Handle "Bad Command List" errors. */
|
|
if ((completed & 3) && (qcb->hwqcb->req.error == 0))
|
|
qcb->hwqcb->req.error = CMD_REJECTED;
|
|
ida_done(ida, qcb);
|
|
}
|
|
ida_startio(ida);
|
|
mtx_unlock(&ida->lock);
|
|
}
|
|
|
|
/*
|
|
* should switch out command type; may be status, not just I/O.
|
|
*/
|
|
static void
|
|
ida_done(struct ida_softc *ida, struct ida_qcb *qcb)
|
|
{
|
|
bus_dmasync_op_t op;
|
|
int active, error = 0;
|
|
|
|
/*
|
|
* finish up command
|
|
*/
|
|
if (!dumping)
|
|
mtx_assert(&ida->lock, MA_OWNED);
|
|
active = (qcb->state != QCB_FREE);
|
|
if (qcb->flags & DMA_DATA_TRANSFER && active) {
|
|
switch (qcb->flags & DMA_DATA_TRANSFER) {
|
|
case DMA_DATA_TRANSFER:
|
|
op = BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE;
|
|
break;
|
|
case DMA_DATA_IN:
|
|
op = BUS_DMASYNC_POSTREAD;
|
|
break;
|
|
default:
|
|
KASSERT((qcb->flags & DMA_DATA_TRANSFER) ==
|
|
DMA_DATA_OUT, ("bad DMA data flags"));
|
|
op = BUS_DMASYNC_POSTWRITE;
|
|
break;
|
|
}
|
|
bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
|
|
bus_dmamap_unload(ida->buffer_dmat, qcb->dmamap);
|
|
}
|
|
if (active)
|
|
bus_dmamap_sync(ida->hwqcb_dmat, ida->hwqcb_dmamap,
|
|
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
|
|
|
|
if (qcb->hwqcb->req.error & SOFT_ERROR) {
|
|
if (qcb->buf)
|
|
device_printf(ida->dev, "soft %s error\n",
|
|
qcb->buf->bio_cmd == BIO_READ ?
|
|
"read" : "write");
|
|
else
|
|
device_printf(ida->dev, "soft error\n");
|
|
}
|
|
if (qcb->hwqcb->req.error & HARD_ERROR) {
|
|
error = 1;
|
|
if (qcb->buf)
|
|
device_printf(ida->dev, "hard %s error\n",
|
|
qcb->buf->bio_cmd == BIO_READ ?
|
|
"read" : "write");
|
|
else
|
|
device_printf(ida->dev, "hard error\n");
|
|
}
|
|
if (qcb->hwqcb->req.error & CMD_REJECTED) {
|
|
error = 1;
|
|
device_printf(ida->dev, "invalid request\n");
|
|
}
|
|
if (qcb->error) {
|
|
error = 1;
|
|
device_printf(ida->dev, "request failed to map: %d\n", qcb->error);
|
|
}
|
|
|
|
if (qcb->flags & IDA_COMMAND) {
|
|
if (ida->flags & IDA_INTERRUPTS)
|
|
wakeup(qcb);
|
|
if (qcb->state == QCB_TIMEDOUT)
|
|
ida_free_qcb(ida, qcb);
|
|
} else {
|
|
KASSERT(qcb->buf != NULL, ("ida_done(): qcb->buf is NULL!"));
|
|
if (error)
|
|
qcb->buf->bio_flags |= BIO_ERROR;
|
|
idad_intr(qcb->buf);
|
|
ida_free_qcb(ida, qcb);
|
|
}
|
|
|
|
if (!active)
|
|
return;
|
|
|
|
ida->qactive--;
|
|
/* Reschedule or cancel timeout */
|
|
if (ida->qactive)
|
|
callout_reset(&ida->ch, hz * 5, ida_timeout, ida);
|
|
else
|
|
callout_stop(&ida->ch);
|
|
}
|
|
|
|
static void
|
|
ida_timeout(void *arg)
|
|
{
|
|
struct ida_softc *ida;
|
|
|
|
ida = (struct ida_softc *)arg;
|
|
device_printf(ida->dev, "%s() qactive %d\n", __func__, ida->qactive);
|
|
|
|
if (ida->flags & IDA_INTERRUPTS)
|
|
device_printf(ida->dev, "IDA_INTERRUPTS\n");
|
|
|
|
device_printf(ida->dev, "\t R_CMD_FIFO: %08x\n"
|
|
"\t R_DONE_FIFO: %08x\n"
|
|
"\t R_INT_MASK: %08x\n"
|
|
"\t R_STATUS: %08x\n"
|
|
"\tR_INT_PENDING: %08x\n",
|
|
ida_inl(ida, R_CMD_FIFO),
|
|
ida_inl(ida, R_DONE_FIFO),
|
|
ida_inl(ida, R_INT_MASK),
|
|
ida_inl(ida, R_STATUS),
|
|
ida_inl(ida, R_INT_PENDING));
|
|
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* IOCTL stuff follows.
|
|
*/
|
|
struct cmd_info {
|
|
int cmd;
|
|
int len;
|
|
int flags;
|
|
};
|
|
static struct cmd_info *ida_cmd_lookup(int);
|
|
|
|
static int
|
|
ida_ioctl (struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, struct thread *td)
|
|
{
|
|
struct ida_softc *sc;
|
|
struct ida_user_command *uc;
|
|
struct cmd_info *ci;
|
|
int len;
|
|
int flags;
|
|
int error;
|
|
int data;
|
|
void *daddr;
|
|
|
|
sc = (struct ida_softc *)dev->si_drv1;
|
|
uc = (struct ida_user_command *)addr;
|
|
error = 0;
|
|
|
|
switch (cmd) {
|
|
case IDAIO_COMMAND:
|
|
ci = ida_cmd_lookup(uc->command);
|
|
if (ci == NULL) {
|
|
error = EINVAL;
|
|
break;
|
|
}
|
|
len = ci->len;
|
|
flags = ci->flags;
|
|
if (len)
|
|
daddr = &uc->d.buf;
|
|
else {
|
|
daddr = &data;
|
|
len = sizeof(data);
|
|
}
|
|
mtx_lock(&sc->lock);
|
|
error = ida_command(sc, uc->command, daddr, len,
|
|
uc->drive, uc->blkno, flags);
|
|
mtx_unlock(&sc->lock);
|
|
break;
|
|
default:
|
|
error = ENOIOCTL;
|
|
break;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
static struct cmd_info ci_list[] = {
|
|
{ CMD_GET_LOG_DRV_INFO,
|
|
sizeof(struct ida_drive_info), DMA_DATA_IN },
|
|
{ CMD_GET_CTRL_INFO,
|
|
sizeof(struct ida_controller_info), DMA_DATA_IN },
|
|
{ CMD_SENSE_DRV_STATUS,
|
|
sizeof(struct ida_drive_status), DMA_DATA_IN },
|
|
{ CMD_START_RECOVERY, 0, 0 },
|
|
{ CMD_GET_PHYS_DRV_INFO,
|
|
sizeof(struct ida_phys_drv_info), DMA_DATA_TRANSFER },
|
|
{ CMD_BLINK_DRV_LEDS,
|
|
sizeof(struct ida_blink_drv_leds), DMA_DATA_OUT },
|
|
{ CMD_SENSE_DRV_LEDS,
|
|
sizeof(struct ida_blink_drv_leds), DMA_DATA_IN },
|
|
{ CMD_GET_LOG_DRV_EXT,
|
|
sizeof(struct ida_drive_info_ext), DMA_DATA_IN },
|
|
{ CMD_RESET_CTRL, 0, 0 },
|
|
{ CMD_GET_CONFIG, 0, 0 },
|
|
{ CMD_SET_CONFIG, 0, 0 },
|
|
{ CMD_LABEL_LOG_DRV,
|
|
sizeof(struct ida_label_logical), DMA_DATA_OUT },
|
|
{ CMD_SET_SURFACE_DELAY, 0, 0 },
|
|
{ CMD_SENSE_BUS_PARAMS, 0, 0 },
|
|
{ CMD_SENSE_SUBSYS_INFO, 0, 0 },
|
|
{ CMD_SENSE_SURFACE_ATS, 0, 0 },
|
|
{ CMD_PASSTHROUGH, 0, 0 },
|
|
{ CMD_RESET_SCSI_DEV, 0, 0 },
|
|
{ CMD_PAUSE_BG_ACT, 0, 0 },
|
|
{ CMD_RESUME_BG_ACT, 0, 0 },
|
|
{ CMD_START_FIRMWARE, 0, 0 },
|
|
{ CMD_SENSE_DRV_ERR_LOG, 0, 0 },
|
|
{ CMD_START_CPM, 0, 0 },
|
|
{ CMD_SENSE_CP, 0, 0 },
|
|
{ CMD_STOP_CPM, 0, 0 },
|
|
{ CMD_FLUSH_CACHE, 0, 0 },
|
|
{ CMD_ACCEPT_MEDIA_EXCH, 0, 0 },
|
|
{ 0, 0, 0 }
|
|
};
|
|
|
|
static struct cmd_info *
|
|
ida_cmd_lookup (int command)
|
|
{
|
|
struct cmd_info *ci;
|
|
|
|
ci = ci_list;
|
|
while (ci->cmd) {
|
|
if (ci->cmd == command)
|
|
return (ci);
|
|
ci++;
|
|
}
|
|
return (NULL);
|
|
}
|