552 lines
14 KiB
C
552 lines
14 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Authors: Joe Kloss; Ravi Pokala (rpokala@freebsd.org)
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*
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* Copyright (c) 2017-2018 Panasas
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* A detailed description of this device is present in imcsmb_pci.c */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/endian.h>
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/atomic.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/smbus/smbconf.h>
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#include "imcsmb_reg.h"
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#include "imcsmb_var.h"
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/* Device methods */
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static int imcsmb_attach(device_t dev);
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static int imcsmb_detach(device_t dev);
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static int imcsmb_probe(device_t dev);
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/* SMBus methods */
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static int imcsmb_callback(device_t dev, int index, void *data);
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static int imcsmb_readb(device_t dev, u_char slave, char cmd, char *byte);
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static int imcsmb_readw(device_t dev, u_char slave, char cmd, short *word);
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static int imcsmb_writeb(device_t dev, u_char slave, char cmd, char byte);
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static int imcsmb_writew(device_t dev, u_char slave, char cmd, short word);
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/* All the read/write methods wrap around this. */
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static int imcsmb_transfer(device_t dev, u_char slave, char cmd, void *data,
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int word_op, int write_op);
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/**
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* device_attach() method. Set up the softc, including getting the set of the
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* parent imcsmb_pci's registers that we will use. Create the smbus(4) device,
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* which any SMBus slave device drivers will connect to.
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*
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* @author rpokala
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*
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* @param[in,out] dev
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* Device being attached.
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*/
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static int
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imcsmb_attach(device_t dev)
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{
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struct imcsmb_softc *sc;
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int rc;
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/* Initialize private state */
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->imcsmb_pci = device_get_parent(dev);
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sc->regs = device_get_ivars(dev);
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/* Create the smbus child */
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sc->smbus = device_add_child(dev, "smbus", -1);
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if (sc->smbus == NULL) {
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/* Nothing has been allocated, so there's no cleanup. */
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device_printf(dev, "Child smbus not added\n");
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rc = ENXIO;
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goto out;
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}
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/* Attach the smbus child. */
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if ((rc = bus_generic_attach(dev)) != 0) {
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device_printf(dev, "Failed to attach smbus: %d\n", rc);
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}
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out:
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return (rc);
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}
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/**
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* device_detach() method. attach() didn't do any allocations, so all that's
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* needed here is to free up any downstream drivers and children.
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*
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* @author Joe Kloss
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*
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* @param[in] dev
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* Device being detached.
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*/
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static int
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imcsmb_detach(device_t dev)
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{
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int rc;
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/* Detach any attached drivers */
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rc = bus_generic_detach(dev);
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if (rc == 0) {
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/* Remove all children */
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rc = device_delete_children(dev);
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}
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return (rc);
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}
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/**
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* device_probe() method. All the actual probing was done by the imcsmb_pci
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* parent, so just report success.
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*
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* @author Joe Kloss
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*
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* @param[in,out] dev
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* Device being probed.
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*/
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static int
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imcsmb_probe(device_t dev)
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{
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device_set_desc(dev, "iMC SMBus controller");
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return (BUS_PROBE_DEFAULT);
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}
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/**
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* smbus_callback() method. Call the parent imcsmb_pci's request or release
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* function to quiesce / restart firmware tasks which might use the SMBus.
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*
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* @author rpokala
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*
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* @param[in] dev
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* Device being requested or released.
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*
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* @param[in] index
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* Either SMB_REQUEST_BUS or SMB_RELEASE_BUS.
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*
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* @param[in] data
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* Tell's the rest of the SMBus subsystem to allow or disallow waiting;
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* this driver only works with SMB_DONTWAIT.
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*/
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static int
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imcsmb_callback(device_t dev, int index, void *data)
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{
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struct imcsmb_softc *sc;
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int *how;
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int rc;
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sc = device_get_softc(dev);
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how = (int *) data;
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switch (index) {
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case SMB_REQUEST_BUS: {
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if (*how != SMB_DONTWAIT) {
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rc = EINVAL;
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goto out;
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}
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rc = imcsmb_pci_request_bus(sc->imcsmb_pci);
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break;
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}
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case SMB_RELEASE_BUS:
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imcsmb_pci_release_bus(sc->imcsmb_pci);
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rc = 0;
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break;
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default:
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rc = EINVAL;
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break;
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}
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out:
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return (rc);
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}
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/**
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* smbus_readb() method. Thin wrapper around imcsmb_transfer().
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*
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* @author Joe Kloss
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*
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* @param[in] dev
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*
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* @param[in] slave
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* The SMBus address of the target device.
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*
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* @param[in] cmd
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* The SMBus command for the target device; this is the offset for SPDs,
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* or the register number for TSODs.
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*
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* @param[out] byte
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* The byte which was read.
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*/
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static int
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imcsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
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{
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return (imcsmb_transfer(dev, slave, cmd, byte, FALSE, FALSE));
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}
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/**
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* smbus_readw() method. Thin wrapper around imcsmb_transfer().
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*
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* @author Joe Kloss
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*
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* @param[in] dev
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*
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* @param[in] slave
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* The SMBus address of the target device.
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*
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* @param[in] cmd
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* The SMBus command for the target device; this is the offset for SPDs,
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* or the register number for TSODs.
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*
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* @param[out] word
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* The word which was read.
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*/
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static int
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imcsmb_readw(device_t dev, u_char slave, char cmd, short *word)
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{
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return (imcsmb_transfer(dev, slave, cmd, word, TRUE, FALSE));
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}
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/**
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* smbus_writeb() method. Thin wrapper around imcsmb_transfer().
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*
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* @author Joe Kloss
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*
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* @param[in] dev
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*
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* @param[in] slave
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* The SMBus address of the target device.
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*
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* @param[in] cmd
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* The SMBus command for the target device; this is the offset for SPDs,
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* or the register number for TSODs.
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*
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* @param[in] byte
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* The byte to write.
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*/
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static int
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imcsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
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{
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return (imcsmb_transfer(dev, slave, cmd, &byte, FALSE, TRUE));
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}
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/**
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* smbus_writew() method. Thin wrapper around imcsmb_transfer().
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*
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* @author Joe Kloss
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*
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* @param[in] dev
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*
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* @param[in] slave
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* The SMBus address of the target device.
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*
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* @param[in] cmd
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* The SMBus command for the target device; this is the offset for SPDs,
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* or the register number for TSODs.
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*
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* @param[in] word
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* The word to write.
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*/
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static int
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imcsmb_writew(device_t dev, u_char slave, char cmd, short word)
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{
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return (imcsmb_transfer(dev, slave, cmd, &word, TRUE, TRUE));
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}
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/**
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* Manipulate the PCI control registers to read data from or write data to the
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* SMBus controller.
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*
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* @author Joe Kloss, rpokala
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*
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* @param[in] dev
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*
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* @param[in] slave
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* The SMBus address of the target device.
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*
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* @param[in] cmd
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* The SMBus command for the target device; this is the offset for SPDs,
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* or the register number for TSODs.
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*
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* @param[in,out] data
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* Pointer to either the value to be written, or where to place the value
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* which was read.
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*
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* @param[in] word_op
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* Bool: is this a word operation?
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*
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* @param[in] write_op
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* Bool: is this a write operation?
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*/
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static int
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imcsmb_transfer(device_t dev, u_char slave, char cmd, void *data, int word_op,
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int write_op)
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{
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struct imcsmb_softc *sc;
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int i;
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int rc;
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uint32_t cmd_val;
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uint32_t cntl_val;
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uint32_t orig_cntl_val;
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uint32_t stat_val;
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uint16_t *word;
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uint16_t lword;
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uint8_t *byte;
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uint8_t lbyte;
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sc = device_get_softc(dev);
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byte = data;
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word = data;
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lbyte = *byte;
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lword = *word;
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/* We modify the value of the control register; save the original, so
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* we can restore it later
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*/
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orig_cntl_val = pci_read_config(sc->imcsmb_pci,
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sc->regs->smb_cntl, 4);
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cntl_val = orig_cntl_val;
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/*
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* Set up the SMBCNTL register
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*/
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/* [31:28] Clear the existing value of the DTI bits, then set them to
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* the four high bits of the slave address.
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*/
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cntl_val &= ~IMCSMB_CNTL_DTI_MASK;
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cntl_val |= ((uint32_t) slave & 0xf0) << 24;
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/* [27:27] Set the CLK_OVERRIDE bit, to enable normal operation */
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cntl_val |= IMCSMB_CNTL_CLK_OVERRIDE;
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/* [26:26] Clear the WRITE_DISABLE bit; the datasheet says this isn't
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* necessary, but empirically, it is.
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*/
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cntl_val &= ~IMCSMB_CNTL_WRITE_DISABLE_BIT;
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/* [9:9] Clear the POLL_EN bit, to stop the hardware TSOD polling. */
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cntl_val &= ~IMCSMB_CNTL_POLL_EN;
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/*
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* Set up the SMBCMD register
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*/
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/* [31:31] Set the TRIGGER bit; when this gets written, the controller
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* will issue the command.
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*/
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cmd_val = IMCSMB_CMD_TRIGGER_BIT;
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/* [29:29] For word operations, set the WORD_ACCESS bit. */
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if (word_op) {
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cmd_val |= IMCSMB_CMD_WORD_ACCESS;
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}
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/* [27:27] For write operations, set the WRITE bit. */
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if (write_op) {
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cmd_val |= IMCSMB_CMD_WRITE_BIT;
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}
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/* [26:24] The three non-DTI, non-R/W bits of the slave address. */
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cmd_val |= (uint32_t) ((slave & 0xe) << 23);
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/* [23:16] The command (offset in the case of an EEPROM, or register in
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* the case of TSOD or NVDIMM controller).
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*/
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cmd_val |= (uint32_t) ((uint8_t) cmd << 16);
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/* [15:0] The data to be written for a write operation. */
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if (write_op) {
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if (word_op) {
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/* The datasheet says the controller uses different
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* endianness for word operations on I2C vs SMBus!
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* I2C: [15:8] = MSB; [7:0] = LSB
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* SMB: [15:8] = LSB; [7:0] = MSB
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* As a practical matter, this controller is very
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* specifically for use with DIMMs, the SPD (and
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* NVDIMM controllers) are only accessed as bytes,
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* the temperature sensor is only accessed as words, and
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* the temperature sensors are I2C. Thus, byte-swap the
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* word.
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*/
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lword = htobe16(lword);
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} else {
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/* For byte operations, the data goes in the LSB, and
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* the MSB is a don't care.
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*/
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lword = (uint16_t) (lbyte & 0xff);
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}
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cmd_val |= lword;
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}
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/* Write the updated value to the control register first, to disable
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* the hardware TSOD polling.
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*/
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pci_write_config(sc->imcsmb_pci, sc->regs->smb_cntl, cntl_val, 4);
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/* Poll on the BUSY bit in the status register until clear, or timeout.
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* We just cleared the auto-poll bit, so we need to make sure the device
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* is idle before issuing a command. We can safely timeout after 35 ms,
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* as this is the maximum time the SMBus spec allows for a transaction.
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*/
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for (i = 4; i != 0; i--) {
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stat_val = pci_read_config(sc->imcsmb_pci, sc->regs->smb_stat,
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4);
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if ((stat_val & IMCSMB_STATUS_BUSY_BIT) == 0) {
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break;
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}
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pause("imcsmb", 10 * hz / 1000);
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}
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if (i == 0) {
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device_printf(sc->dev,
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"transfer: timeout waiting for device to settle\n");
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}
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/* Now that polling has stopped, we can write the command register. This
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* starts the SMBus command.
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*/
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pci_write_config(sc->imcsmb_pci, sc->regs->smb_cmd, cmd_val, 4);
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/* Wait for WRITE_DATA_DONE/READ_DATA_VALID to be set, or timeout and
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* fail. We wait up to 35ms.
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*/
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for (i = 35000; i != 0; i -= 10)
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{
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DELAY(10);
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stat_val = pci_read_config(sc->imcsmb_pci, sc->regs->smb_stat,
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4);
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/* For a write, the bits holding the data contain the data being
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* written. You'd think that would cause the READ_DATA_VALID bit
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* to be cleared, because the data bits no longer contain valid
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* data from the most recent read operation. While that would be
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* logical, that's not the case here: READ_DATA_VALID is only
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* cleared when starting a read operation, and WRITE_DATA_DONE
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* is only cleared when starting a write operation.
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*/
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if (write_op) {
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if ((stat_val & IMCSMB_STATUS_WRITE_DATA_DONE) != 0) {
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break;
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}
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} else {
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if ((stat_val & IMCSMB_STATUS_READ_DATA_VALID) != 0) {
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break;
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}
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}
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}
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if (i == 0) {
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rc = SMB_ETIMEOUT;
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device_printf(dev, "transfer timeout\n");
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goto out;
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}
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/* It is generally the case that this bit indicates non-ACK, but it
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* could also indicate other bus errors. There's no way to tell the
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* difference.
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*/
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if ((stat_val & IMCSMB_STATUS_BUS_ERROR_BIT) != 0) {
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/* While it is not documented, empirically, SPD page-change
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* commands (writes with DTI = 0x60) always complete with the
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* error bit set. So, ignore it in those cases.
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*/
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if ((slave & 0xf0) != 0x60) {
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rc = SMB_ENOACK;
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goto out;
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}
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}
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/* For a read operation, copy the data out */
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if (write_op == 0) {
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if (word_op) {
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/* The data is returned in bits [15:0]; as discussed
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* above, byte-swap.
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*/
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lword = (uint16_t) (stat_val & 0xffff);
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lword = htobe16(lword);
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*word = lword;
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} else {
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/* The data is returned in bits [7:0] */
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lbyte = (uint8_t) (stat_val & 0xff);
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*byte = lbyte;
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}
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}
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/* A lack of an error is, de facto, success. */
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rc = SMB_ENOERR;
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out:
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/* Restore the original value of the control register. */
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pci_write_config(sc->imcsmb_pci, sc->regs->smb_cntl, orig_cntl_val, 4);
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return (rc);
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}
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/* Device methods */
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static device_method_t imcsmb_methods[] = {
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/* Device interface */
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DEVMETHOD(device_attach, imcsmb_attach),
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|
DEVMETHOD(device_detach, imcsmb_detach),
|
|
DEVMETHOD(device_probe, imcsmb_probe),
|
|
|
|
/* smbus methods */
|
|
DEVMETHOD(smbus_callback, imcsmb_callback),
|
|
DEVMETHOD(smbus_readb, imcsmb_readb),
|
|
DEVMETHOD(smbus_readw, imcsmb_readw),
|
|
DEVMETHOD(smbus_writeb, imcsmb_writeb),
|
|
DEVMETHOD(smbus_writew, imcsmb_writew),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t imcsmb_driver = {
|
|
.name = "imcsmb",
|
|
.methods = imcsmb_methods,
|
|
.size = sizeof(struct imcsmb_softc),
|
|
};
|
|
|
|
DRIVER_MODULE(imcsmb, imcsmb_pci, imcsmb_driver, 0, 0);
|
|
MODULE_DEPEND(imcsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
|
|
MODULE_VERSION(imcsmb, 1);
|
|
|
|
DRIVER_MODULE(smbus, imcsmb, smbus_driver, 0, 0);
|
|
|
|
/* vi: set ts=8 sw=4 sts=8 noet: */
|