146 lines
5.5 KiB
C
146 lines
5.5 KiB
C
/******************************************************************************
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SPDX-License-Identifier: BSD-3-Clause
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Copyright (c) 2001-2020, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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#ifndef _IXGBE_VF_H_
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#define _IXGBE_VF_H_
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#define IXGBE_VF_IRQ_CLEAR_MASK 7
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#define IXGBE_VF_MAX_TX_QUEUES 8
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#define IXGBE_VF_MAX_RX_QUEUES 8
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/* DCB define */
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#define IXGBE_VF_MAX_TRAFFIC_CLASS 8
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#define IXGBE_VFCTRL 0x00000
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#define IXGBE_VFSTATUS 0x00008
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#define IXGBE_VFLINKS 0x00010
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#define IXGBE_VFFRTIMER 0x00048
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#define IXGBE_VFRXMEMWRAP 0x03190
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#define IXGBE_VTEICR 0x00100
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#define IXGBE_VTEICS 0x00104
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#define IXGBE_VTEIMS 0x00108
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#define IXGBE_VTEIMC 0x0010C
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#define IXGBE_VTEIAC 0x00110
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#define IXGBE_VTEIAM 0x00114
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#define IXGBE_VTEITR(x) (0x00820 + (4 * (x)))
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#define IXGBE_VTIVAR(x) (0x00120 + (4 * (x)))
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#define IXGBE_VTIVAR_MISC 0x00140
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#define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x)))
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/* define IXGBE_VFPBACL still says TBD in EAS */
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#define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x)))
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#define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x)))
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#define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x)))
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#define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x)))
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#define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x)))
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#define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x)))
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#define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x)))
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#define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * (x)))
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#define IXGBE_VFPSRTYPE 0x00300
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#define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * (x)))
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#define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * (x)))
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#define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * (x)))
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#define IXGBE_VFTDH(x) (0x02010 + (0x40 * (x)))
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#define IXGBE_VFTDT(x) (0x02018 + (0x40 * (x)))
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#define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * (x)))
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#define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * (x)))
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#define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * (x)))
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#define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * (x)))
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#define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * (x)))
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#define IXGBE_VFGPRC 0x0101C
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#define IXGBE_VFGPTC 0x0201C
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#define IXGBE_VFGORC_LSB 0x01020
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#define IXGBE_VFGORC_MSB 0x01024
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#define IXGBE_VFGOTC_LSB 0x02020
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#define IXGBE_VFGOTC_MSB 0x02024
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#define IXGBE_VFMPRC 0x01034
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#define IXGBE_VFMRQC 0x3000
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#define IXGBE_VFRSSRK(x) (0x3100 + ((x) * 4))
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#define IXGBE_VFRETA(x) (0x3200 + ((x) * 4))
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struct ixgbevf_hw_stats {
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u64 base_vfgprc;
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u64 base_vfgptc;
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u64 base_vfgorc;
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u64 base_vfgotc;
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u64 base_vfmprc;
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u64 last_vfgprc;
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u64 last_vfgptc;
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u64 last_vfgorc;
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u64 last_vfgotc;
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u64 last_vfmprc;
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u64 vfgprc;
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u64 vfgptc;
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u64 vfgorc;
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u64 vfgotc;
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u64 vfmprc;
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u64 saved_reset_vfgprc;
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u64 saved_reset_vfgptc;
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u64 saved_reset_vfgorc;
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u64 saved_reset_vfgotc;
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u64 saved_reset_vfmprc;
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};
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s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
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s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw);
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s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw);
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s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw);
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s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw);
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u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
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u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
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s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr);
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s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
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bool autoneg_wait_to_complete);
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s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
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bool *link_up, bool autoneg_wait_to_complete);
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s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
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u32 enable_addr);
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s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
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s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
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u32 mc_addr_count, ixgbe_mc_addr_itr,
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bool clear);
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s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode);
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s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state);
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s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
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bool vlan_on, bool vlvf_bypass);
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s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size);
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int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api);
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int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
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unsigned int *default_tc);
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#endif /* __IXGBE_VF_H__ */
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