731 lines
18 KiB
C
731 lines
18 KiB
C
/*-
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* Copyright (c) 2011 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_pci.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/ofwpci.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcib_private.h>
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include "pcib_if.h"
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/*
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* If it is necessary to set another value of this for
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* some platforms it should be set at fdt.h file
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*/
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#ifndef PCI_MAP_INTR
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#define PCI_MAP_INTR 4
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#endif
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#define PCI_INTR_PINS 4
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/*
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* bus interface.
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*/
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static struct resource * ofw_pcib_alloc_resource(device_t, device_t,
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int, int *, rman_res_t, rman_res_t, rman_res_t, u_int);
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static int ofw_pcib_release_resource(device_t, device_t, int, int,
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struct resource *);
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static int ofw_pcib_activate_resource(device_t, device_t, int, int,
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struct resource *);
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static int ofw_pcib_deactivate_resource(device_t, device_t, int, int,
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struct resource *);
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static int ofw_pcib_adjust_resource(device_t, device_t, int,
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struct resource *, rman_res_t, rman_res_t);
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static int ofw_pcib_translate_resource(device_t bus, int type,
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rman_res_t start, rman_res_t *newstart);
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#ifdef __powerpc__
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static bus_space_tag_t ofw_pcib_bus_get_bus_tag(device_t, device_t);
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#endif
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/*
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* pcib interface
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*/
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static int ofw_pcib_maxslots(device_t);
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/*
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* ofw_bus interface
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*/
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static phandle_t ofw_pcib_get_node(device_t, device_t);
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/*
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* local methods
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*/
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static int ofw_pcib_fill_ranges(phandle_t, struct ofw_pci_range *);
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static struct rman *ofw_pcib_get_rman(struct ofw_pci_softc *, int, u_int);
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/*
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* Driver methods.
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*/
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static device_method_t ofw_pcib_methods[] = {
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/* Device interface */
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DEVMETHOD(device_attach, ofw_pcib_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, ofw_pcib_read_ivar),
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DEVMETHOD(bus_write_ivar, ofw_pcib_write_ivar),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_alloc_resource, ofw_pcib_alloc_resource),
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DEVMETHOD(bus_release_resource, ofw_pcib_release_resource),
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DEVMETHOD(bus_activate_resource, ofw_pcib_activate_resource),
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DEVMETHOD(bus_deactivate_resource, ofw_pcib_deactivate_resource),
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DEVMETHOD(bus_adjust_resource, ofw_pcib_adjust_resource),
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DEVMETHOD(bus_translate_resource, ofw_pcib_translate_resource),
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#ifdef __powerpc__
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DEVMETHOD(bus_get_bus_tag, ofw_pcib_bus_get_bus_tag),
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#endif
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, ofw_pcib_maxslots),
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DEVMETHOD(pcib_route_interrupt, ofw_pcib_route_interrupt),
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DEVMETHOD(pcib_request_feature, pcib_request_feature_allow),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, ofw_pcib_get_node),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(ofw_pcib, ofw_pcib_driver, ofw_pcib_methods, 0);
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int
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ofw_pcib_init(device_t dev)
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{
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struct ofw_pci_softc *sc;
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phandle_t node;
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u_int32_t busrange[2];
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struct ofw_pci_range *rp;
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int i, error;
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struct ofw_pci_cell_info *cell_info;
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node = ofw_bus_get_node(dev);
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sc = device_get_softc(dev);
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sc->sc_initialized = 1;
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sc->sc_range = NULL;
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sc->sc_pci_domain = device_get_unit(dev);
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cell_info = (struct ofw_pci_cell_info *)malloc(sizeof(*cell_info),
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M_DEVBUF, M_WAITOK | M_ZERO);
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sc->sc_cell_info = cell_info;
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if (OF_getencprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
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busrange[0] = 0;
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sc->sc_dev = dev;
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sc->sc_node = node;
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sc->sc_bus = busrange[0];
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if (sc->sc_quirks & OFW_PCI_QUIRK_RANGES_ON_CHILDREN) {
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phandle_t c;
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int n, i;
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sc->sc_nrange = 0;
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for (c = OF_child(node); c != 0; c = OF_peer(c)) {
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n = ofw_pcib_nranges(c, cell_info);
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if (n > 0)
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sc->sc_nrange += n;
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}
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if (sc->sc_nrange == 0) {
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error = ENXIO;
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goto out;
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}
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sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]),
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M_DEVBUF, M_WAITOK);
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i = 0;
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for (c = OF_child(node); c != 0; c = OF_peer(c)) {
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n = ofw_pcib_fill_ranges(c, &sc->sc_range[i]);
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if (n > 0)
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i += n;
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}
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KASSERT(i == sc->sc_nrange, ("range count mismatch"));
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} else {
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sc->sc_nrange = ofw_pcib_nranges(node, cell_info);
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if (sc->sc_nrange <= 0) {
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device_printf(dev, "could not getranges\n");
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error = ENXIO;
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goto out;
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}
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sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]),
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M_DEVBUF, M_WAITOK);
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ofw_pcib_fill_ranges(node, sc->sc_range);
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}
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sc->sc_io_rman.rm_type = RMAN_ARRAY;
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sc->sc_io_rman.rm_descr = "PCI I/O Ports";
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error = rman_init(&sc->sc_io_rman);
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if (error != 0) {
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device_printf(dev, "rman_init() failed. error = %d\n", error);
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goto out;
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}
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "PCI Non Prefetchable Memory";
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error = rman_init(&sc->sc_mem_rman);
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if (error != 0) {
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device_printf(dev, "rman_init() failed. error = %d\n", error);
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goto out_mem_rman;
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}
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sc->sc_pmem_rman.rm_type = RMAN_ARRAY;
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sc->sc_pmem_rman.rm_descr = "PCI Prefetchable Memory";
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error = rman_init(&sc->sc_pmem_rman);
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if (error != 0) {
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device_printf(dev, "rman_init() failed. error = %d\n", error);
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goto out_pmem_rman;
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}
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for (i = 0; i < sc->sc_nrange; i++) {
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error = 0;
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rp = sc->sc_range + i;
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if (sc->sc_range_mask & ((uint64_t)1 << i))
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continue;
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switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
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case OFW_PCI_PHYS_HI_SPACE_CONFIG:
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break;
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case OFW_PCI_PHYS_HI_SPACE_IO:
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error = rman_manage_region(&sc->sc_io_rman, rp->pci,
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rp->pci + rp->size - 1);
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break;
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case OFW_PCI_PHYS_HI_SPACE_MEM32:
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case OFW_PCI_PHYS_HI_SPACE_MEM64:
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if (rp->pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) {
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sc->sc_have_pmem = 1;
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error = rman_manage_region(&sc->sc_pmem_rman,
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rp->pci, rp->pci + rp->size - 1);
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} else {
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error = rman_manage_region(&sc->sc_mem_rman,
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rp->pci, rp->pci + rp->size - 1);
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}
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break;
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}
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if (error != 0) {
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device_printf(dev,
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"rman_manage_region(%x, %#jx, %#jx) failed. "
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"error = %d\n", rp->pci_hi &
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OFW_PCI_PHYS_HI_SPACEMASK, rp->pci,
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rp->pci + rp->size - 1, error);
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goto out_full;
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}
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}
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ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
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return (0);
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out_full:
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rman_fini(&sc->sc_pmem_rman);
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out_pmem_rman:
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rman_fini(&sc->sc_mem_rman);
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out_mem_rman:
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rman_fini(&sc->sc_io_rman);
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out:
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free(sc->sc_cell_info, M_DEVBUF);
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free(sc->sc_range, M_DEVBUF);
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return (error);
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}
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void
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ofw_pcib_fini(device_t dev)
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{
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struct ofw_pci_softc *sc;
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sc = device_get_softc(dev);
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free(sc->sc_cell_info, M_DEVBUF);
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free(sc->sc_range, M_DEVBUF);
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rman_fini(&sc->sc_io_rman);
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rman_fini(&sc->sc_mem_rman);
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rman_fini(&sc->sc_pmem_rman);
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}
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int
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ofw_pcib_attach(device_t dev)
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{
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struct ofw_pci_softc *sc;
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int error;
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sc = device_get_softc(dev);
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if (!sc->sc_initialized) {
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error = ofw_pcib_init(dev);
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if (error != 0)
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return (error);
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}
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device_add_child(dev, "pci", -1);
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return (bus_generic_attach(dev));
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}
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static int
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ofw_pcib_maxslots(device_t dev)
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{
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return (PCI_SLOTMAX);
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}
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int
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ofw_pcib_route_interrupt(device_t bus, device_t dev, int pin)
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{
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struct ofw_pci_softc *sc;
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struct ofw_pci_register reg;
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uint32_t pintr, mintr[PCI_MAP_INTR];
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int intrcells;
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phandle_t iparent;
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sc = device_get_softc(bus);
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pintr = pin;
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/* Fabricate imap information in case this isn't an OFW device */
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bzero(®, sizeof(reg));
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reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
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(pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
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(pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
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intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev),
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&sc->sc_pci_iinfo, ®, sizeof(reg), &pintr, sizeof(pintr),
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mintr, sizeof(mintr), &iparent);
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if (intrcells != 0) {
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pintr = ofw_bus_map_intr(dev, iparent, intrcells, mintr);
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return (pintr);
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}
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/*
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* Maybe it's a real interrupt, not an intpin
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*/
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if (pin > PCI_INTR_PINS)
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return (pin);
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device_printf(bus, "could not route pin %d for device %d.%d\n",
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pin, pci_get_slot(dev), pci_get_function(dev));
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return (PCI_INVALID_IRQ);
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}
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int
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ofw_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct ofw_pci_softc *sc;
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sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_DOMAIN:
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*result = sc->sc_pci_domain;
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return (0);
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case PCIB_IVAR_BUS:
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*result = sc->sc_bus;
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return (0);
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default:
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break;
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}
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return (ENOENT);
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}
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int
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ofw_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
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{
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struct ofw_pci_softc *sc;
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sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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sc->sc_bus = value;
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return (0);
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default:
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break;
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}
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return (ENOENT);
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}
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int
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ofw_pcib_nranges(phandle_t node, struct ofw_pci_cell_info *info)
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{
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ssize_t nbase_ranges;
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if (info == NULL)
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return (-1);
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info->host_address_cells = 1;
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info->size_cells = 2;
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info->pci_address_cell = 3;
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OF_getencprop(OF_parent(node), "#address-cells",
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&(info->host_address_cells), sizeof(info->host_address_cells));
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OF_getencprop(node, "#address-cells",
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&(info->pci_address_cell), sizeof(info->pci_address_cell));
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OF_getencprop(node, "#size-cells", &(info->size_cells),
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sizeof(info->size_cells));
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nbase_ranges = OF_getproplen(node, "ranges");
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if (nbase_ranges <= 0)
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return (-1);
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return (nbase_ranges / sizeof(cell_t) /
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(info->pci_address_cell + info->host_address_cells +
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info->size_cells));
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}
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static struct resource *
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ofw_pcib_alloc_resource(device_t bus, device_t child, int type, int *rid,
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rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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struct ofw_pci_softc *sc;
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struct resource *rv;
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struct rman *rm;
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int needactivate;
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needactivate = flags & RF_ACTIVE;
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flags &= ~RF_ACTIVE;
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sc = device_get_softc(bus);
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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if (type == PCI_RES_BUS) {
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return (pci_domain_alloc_bus(sc->sc_pci_domain, child, rid,
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start, end, count, flags | needactivate));
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}
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#endif
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rm = ofw_pcib_get_rman(sc, type, flags);
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if (rm == NULL) {
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return (bus_generic_alloc_resource(bus, child, type, rid,
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start, end, count, flags | needactivate));
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}
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rv = rman_reserve_resource(rm, start, end, count, flags, child);
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if (rv == NULL) {
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device_printf(bus, "failed to reserve resource for %s\n",
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device_get_nameunit(child));
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return (NULL);
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}
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rman_set_rid(rv, *rid);
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if (needactivate) {
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if (bus_activate_resource(child, type, *rid, rv) != 0) {
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device_printf(bus,
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"failed to activate resource for %s\n",
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device_get_nameunit(child));
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rman_release_resource(rv);
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return (NULL);
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}
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}
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|
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return (rv);
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}
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|
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static int
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ofw_pcib_release_resource(device_t bus, device_t child, int type, int rid,
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struct resource *res)
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{
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struct ofw_pci_softc *sc;
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struct rman *rm;
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int error;
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sc = device_get_softc(bus);
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|
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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if (type == PCI_RES_BUS)
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return (pci_domain_release_bus(sc->sc_pci_domain, child, rid,
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res));
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#endif
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rm = ofw_pcib_get_rman(sc, type, rman_get_flags(res));
|
|
if (rm == NULL) {
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return (bus_generic_release_resource(bus, child, type, rid,
|
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res));
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}
|
|
KASSERT(rman_is_region_manager(res, rm), ("rman mismatch"));
|
|
|
|
if (rman_get_flags(res) & RF_ACTIVE) {
|
|
error = bus_deactivate_resource(child, type, rid, res);
|
|
if (error != 0)
|
|
return (error);
|
|
}
|
|
return (rman_release_resource(res));
|
|
}
|
|
|
|
static int
|
|
ofw_pcib_translate_resource(device_t bus, int type, rman_res_t start,
|
|
rman_res_t *newstart)
|
|
{
|
|
struct ofw_pci_softc *sc;
|
|
struct ofw_pci_range *rp;
|
|
int space;
|
|
|
|
sc = device_get_softc(bus);
|
|
|
|
/*
|
|
* Map this through the ranges list
|
|
*/
|
|
for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
|
|
rp->pci_hi != 0; rp++) {
|
|
if (start < rp->pci || start >= rp->pci + rp->size)
|
|
continue;
|
|
|
|
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
|
|
case OFW_PCI_PHYS_HI_SPACE_IO:
|
|
space = SYS_RES_IOPORT;
|
|
break;
|
|
case OFW_PCI_PHYS_HI_SPACE_MEM32:
|
|
case OFW_PCI_PHYS_HI_SPACE_MEM64:
|
|
space = SYS_RES_MEMORY;
|
|
break;
|
|
default:
|
|
space = -1;
|
|
}
|
|
|
|
if (type == space) {
|
|
start += (rp->host - rp->pci);
|
|
*newstart = start;
|
|
return (0);
|
|
}
|
|
}
|
|
return (ENOENT);
|
|
}
|
|
|
|
static int
|
|
ofw_pcib_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
struct ofw_pci_softc *sc;
|
|
bus_space_handle_t handle;
|
|
bus_space_tag_t tag;
|
|
struct ofw_pci_range *rp;
|
|
vm_paddr_t start;
|
|
int space;
|
|
int rv;
|
|
|
|
sc = device_get_softc(bus);
|
|
|
|
if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY) {
|
|
return (bus_generic_activate_resource(bus, child, type, rid,
|
|
res));
|
|
}
|
|
|
|
start = (vm_paddr_t)rman_get_start(res);
|
|
|
|
/*
|
|
* Map this through the ranges list
|
|
*/
|
|
for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
|
|
rp->pci_hi != 0; rp++) {
|
|
if (start < rp->pci || start >= rp->pci + rp->size)
|
|
continue;
|
|
|
|
switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
|
|
case OFW_PCI_PHYS_HI_SPACE_IO:
|
|
space = SYS_RES_IOPORT;
|
|
break;
|
|
case OFW_PCI_PHYS_HI_SPACE_MEM32:
|
|
case OFW_PCI_PHYS_HI_SPACE_MEM64:
|
|
space = SYS_RES_MEMORY;
|
|
break;
|
|
default:
|
|
space = -1;
|
|
}
|
|
|
|
if (type == space) {
|
|
start += (rp->host - rp->pci);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (bootverbose)
|
|
printf("ofw_pci mapdev: start %jx, len %jd\n",
|
|
(rman_res_t)start, rman_get_size(res));
|
|
|
|
tag = BUS_GET_BUS_TAG(child, child);
|
|
if (tag == NULL)
|
|
return (ENOMEM);
|
|
|
|
rman_set_bustag(res, tag);
|
|
rv = bus_space_map(tag, start,
|
|
rman_get_size(res), 0, &handle);
|
|
if (rv != 0)
|
|
return (ENOMEM);
|
|
|
|
rman_set_bushandle(res, handle);
|
|
rman_set_virtual(res, (void *)handle); /* XXX for powerpc only ? */
|
|
|
|
return (rman_activate_resource(res));
|
|
}
|
|
|
|
#ifdef __powerpc__
|
|
static bus_space_tag_t
|
|
ofw_pcib_bus_get_bus_tag(device_t bus, device_t child)
|
|
{
|
|
|
|
return (&bs_le_tag);
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
ofw_pcib_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
vm_size_t psize;
|
|
|
|
if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY) {
|
|
return (bus_generic_deactivate_resource(bus, child, type, rid,
|
|
res));
|
|
}
|
|
|
|
psize = rman_get_size(res);
|
|
pmap_unmapdev(rman_get_virtual(res), psize);
|
|
|
|
return (rman_deactivate_resource(res));
|
|
}
|
|
|
|
static int
|
|
ofw_pcib_adjust_resource(device_t bus, device_t child, int type,
|
|
struct resource *res, rman_res_t start, rman_res_t end)
|
|
{
|
|
struct rman *rm;
|
|
struct ofw_pci_softc *sc;
|
|
|
|
sc = device_get_softc(bus);
|
|
#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
|
|
if (type == PCI_RES_BUS)
|
|
return (pci_domain_adjust_bus(sc->sc_pci_domain, child, res,
|
|
start, end));
|
|
#endif
|
|
|
|
rm = ofw_pcib_get_rman(sc, type, rman_get_flags(res));
|
|
if (rm == NULL) {
|
|
return (bus_generic_adjust_resource(bus, child, type, res,
|
|
start, end));
|
|
}
|
|
KASSERT(rman_is_region_manager(res, rm), ("rman mismatch"));
|
|
KASSERT(!(rman_get_flags(res) & RF_ACTIVE),
|
|
("active resources cannot be adjusted"));
|
|
|
|
return (rman_adjust_resource(res, start, end));
|
|
}
|
|
|
|
static phandle_t
|
|
ofw_pcib_get_node(device_t bus, device_t dev)
|
|
{
|
|
struct ofw_pci_softc *sc;
|
|
|
|
sc = device_get_softc(bus);
|
|
/* We only have one child, the PCI bus, which needs our own node. */
|
|
|
|
return (sc->sc_node);
|
|
}
|
|
|
|
static int
|
|
ofw_pcib_fill_ranges(phandle_t node, struct ofw_pci_range *ranges)
|
|
{
|
|
int host_address_cells = 1, pci_address_cells = 3, size_cells = 2;
|
|
cell_t *base_ranges;
|
|
ssize_t nbase_ranges;
|
|
int nranges;
|
|
int i, j, k;
|
|
|
|
OF_getencprop(OF_parent(node), "#address-cells", &host_address_cells,
|
|
sizeof(host_address_cells));
|
|
OF_getencprop(node, "#address-cells", &pci_address_cells,
|
|
sizeof(pci_address_cells));
|
|
OF_getencprop(node, "#size-cells", &size_cells, sizeof(size_cells));
|
|
|
|
nbase_ranges = OF_getproplen(node, "ranges");
|
|
if (nbase_ranges <= 0)
|
|
return (-1);
|
|
nranges = nbase_ranges / sizeof(cell_t) /
|
|
(pci_address_cells + host_address_cells + size_cells);
|
|
|
|
base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
|
|
OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
|
|
|
|
for (i = 0, j = 0; i < nranges; i++) {
|
|
ranges[i].pci_hi = base_ranges[j++];
|
|
ranges[i].pci = 0;
|
|
for (k = 0; k < pci_address_cells - 1; k++) {
|
|
ranges[i].pci <<= 32;
|
|
ranges[i].pci |= base_ranges[j++];
|
|
}
|
|
ranges[i].host = 0;
|
|
for (k = 0; k < host_address_cells; k++) {
|
|
ranges[i].host <<= 32;
|
|
ranges[i].host |= base_ranges[j++];
|
|
}
|
|
ranges[i].size = 0;
|
|
for (k = 0; k < size_cells; k++) {
|
|
ranges[i].size <<= 32;
|
|
ranges[i].size |= base_ranges[j++];
|
|
}
|
|
}
|
|
|
|
free(base_ranges, M_DEVBUF);
|
|
return (nranges);
|
|
}
|
|
|
|
static struct rman *
|
|
ofw_pcib_get_rman(struct ofw_pci_softc *sc, int type, u_int flags)
|
|
{
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT:
|
|
return (&sc->sc_io_rman);
|
|
case SYS_RES_MEMORY:
|
|
if (sc->sc_have_pmem && (flags & RF_PREFETCHABLE))
|
|
return (&sc->sc_pmem_rman);
|
|
else
|
|
return (&sc->sc_mem_rman);
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return (NULL);
|
|
}
|