100 lines
2.6 KiB
C
100 lines
2.6 KiB
C
/*-
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* Copyright (c) 1997-2001 Granch, Ltd. All rights reserved.
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* Author: Denis I.Timofeev <timofeev@granch.ru>
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*
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* Redistributon and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* We don't have registered vendor id yet...
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*/
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#define SBNI_PCI_VENDOR 0x55
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#define SBNI_PCI_DEVICE 0x9f
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#define ISA_MODE 0x00
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#define PCI_MODE 0x01
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#define SBNI_PORTS 4
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enum sbni_reg {
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CSR0 = 0,
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CSR1 = 1,
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DAT = 2
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};
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/* CSR0 mapping */
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enum {
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BU_EMP = 0x02,
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RC_CHK = 0x04,
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CT_ZER = 0x08,
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TR_REQ = 0x10,
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TR_RDY = 0x20,
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EN_INT = 0x40,
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RC_RDY = 0x80
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};
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/* CSR1 mapping */
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#define PR_RES 0x80
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struct sbni_csr1 {
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unsigned rxl : 5;
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unsigned rate : 2;
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unsigned : 1;
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};
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#define FRAME_ACK_MASK (u_int16_t)0x7000
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#define FRAME_LEN_MASK (u_int16_t)0x03FF
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#define FRAME_FIRST (u_int16_t)0x8000
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#define FRAME_RETRY (u_int16_t)0x0800
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#define FRAME_SENT_BAD (u_int16_t)0x4000
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#define FRAME_SENT_OK (u_int16_t)0x3000
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enum {
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FL_WAIT_ACK = 1,
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FL_NEED_RESEND = 2,
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FL_PREV_OK = 4,
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FL_SLOW_MODE = 8
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};
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enum {
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DEFAULT_IOBASEADDR = 0x210,
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DEFAULT_INTERRUPTNUMBER = 5,
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DEFAULT_RATE = 0,
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DEFAULT_FRAME_LEN = 1012
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};
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#define DEF_RXL_DELTA -1
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#define DEF_RXL 0xf
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#define SBNI_SIG 0x5a
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#define SBNI_MIN_LEN (ETHER_MIN_LEN - 4)
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#define SBNI_MAX_FRAME 1023
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#define SBNI_HZ 18 /* ticks to wait for pong or packet */
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/* sbni watchdog called SBNI_HZ times per sec. */
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#define TR_ERROR_COUNT 32
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#define CHANGE_LEVEL_START_TICKS 4
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