671bf2b8b2
related to "shared" CPLs. a) Combine t4_set_tcb_field and t4_set_tcb_field_rpl into a single function. Allow callers to direct the response to any iq. Tidy up set_ulp_mode_iscsi while there to use names from t4_tcb.h instead of magic constants. b) Remove all CPL handler tables from struct adapter. This reduces its size by around 2KB. All handlers are now registered at MOD_LOAD instead of attach or some kind of initialization/activation. The registration functions do not need an adapter parameter any more. c) Add per-iq handlers to deal with CPLs whose destination cannot be determined solely from the opcode. There are 2 such CPLs in use right now: SET_TCB_RPL and L2T_WRITE_RPL. The base driver continues to send filter and L2T_WRITEs over the mgmtq and solicits the reply on fwq. t4_tom (including the DDP code) now uses the port's ctrlq to send L2T_WRITEs and SET_TCB_FIELDs and solicits the reply on an ofld_rxq. fwq and ofld_rxq have different handlers that know what kind of tid to expect in the reply. Update t4_write_l2e and callers to to support any wrq/iq combination. Approved by: re@ (kib@) Sponsored by: Chelsio Communications
337 lines
8.7 KiB
C
337 lines
8.7 KiB
C
/*-
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* Copyright (c) 2012 Chelsio Communications, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_inet.h"
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#include "opt_inet6.h"
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#include <sys/param.h>
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#include <sys/eventhandler.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/rwlock.h>
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#include <sys/socket.h>
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#include <sys/sbuf.h>
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#include <netinet/in.h>
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#include "common/common.h"
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#include "common/t4_msg.h"
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#include "t4_l2t.h"
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/*
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* Module locking notes: There is a RW lock protecting the L2 table as a
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* whole plus a spinlock per L2T entry. Entry lookups and allocations happen
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* under the protection of the table lock, individual entry changes happen
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* while holding that entry's spinlock. The table lock nests outside the
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* entry locks. Allocations of new entries take the table lock as writers so
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* no other lookups can happen while allocating new entries. Entry updates
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* take the table lock as readers so multiple entries can be updated in
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* parallel. An L2T entry can be dropped by decrementing its reference count
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* and therefore can happen in parallel with entry allocation but no entry
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* can change state or increment its ref count during allocation as both of
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* these perform lookups.
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*
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* Note: We do not take references to ifnets in this module because both
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* the TOE and the sockets already hold references to the interfaces and the
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* lifetime of an L2T entry is fully contained in the lifetime of the TOE.
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*/
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/*
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* Allocate a free L2T entry. Must be called with l2t_data.lock held.
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*/
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struct l2t_entry *
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t4_alloc_l2e(struct l2t_data *d)
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{
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struct l2t_entry *end, *e, **p;
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rw_assert(&d->lock, RA_WLOCKED);
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if (!atomic_load_acq_int(&d->nfree))
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return (NULL);
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/* there's definitely a free entry */
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for (e = d->rover, end = &d->l2tab[d->l2t_size]; e != end; ++e)
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if (atomic_load_acq_int(&e->refcnt) == 0)
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goto found;
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for (e = d->l2tab; atomic_load_acq_int(&e->refcnt); ++e)
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continue;
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found:
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d->rover = e + 1;
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atomic_subtract_int(&d->nfree, 1);
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/*
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* The entry we found may be an inactive entry that is
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* presently in the hash table. We need to remove it.
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*/
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if (e->state < L2T_STATE_SWITCHING) {
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for (p = &d->l2tab[e->hash].first; *p; p = &(*p)->next) {
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if (*p == e) {
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*p = e->next;
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e->next = NULL;
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break;
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}
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}
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}
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e->state = L2T_STATE_UNUSED;
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return (e);
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}
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/*
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* Write an L2T entry. Must be called with the entry locked.
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* The write may be synchronous or asynchronous.
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*/
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int
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t4_write_l2e(struct l2t_entry *e, int sync)
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{
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struct sge_wrq *wrq;
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struct adapter *sc;
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struct wrq_cookie cookie;
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struct cpl_l2t_write_req *req;
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int idx;
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mtx_assert(&e->lock, MA_OWNED);
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MPASS(e->wrq != NULL);
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wrq = e->wrq;
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sc = wrq->adapter;
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req = start_wrq_wr(wrq, howmany(sizeof(*req), 16), &cookie);
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if (req == NULL)
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return (ENOMEM);
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idx = e->idx + sc->vres.l2t.start;
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INIT_TP_WR(req, 0);
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OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, idx |
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V_SYNC_WR(sync) | V_TID_QID(e->iqid)));
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req->params = htons(V_L2T_W_PORT(e->lport) | V_L2T_W_NOREPLY(!sync));
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req->l2t_idx = htons(idx);
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req->vlan = htons(e->vlan);
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memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
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commit_wrq_wr(wrq, req, &cookie);
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if (sync && e->state != L2T_STATE_SWITCHING)
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e->state = L2T_STATE_SYNC_WRITE;
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return (0);
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}
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/*
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* Allocate an L2T entry for use by a switching rule. Such need to be
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* explicitly freed and while busy they are not on any hash chain, so normal
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* address resolution updates do not see them.
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*/
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struct l2t_entry *
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t4_l2t_alloc_switching(struct l2t_data *d)
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{
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struct l2t_entry *e;
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rw_wlock(&d->lock);
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e = t4_alloc_l2e(d);
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if (e) {
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mtx_lock(&e->lock); /* avoid race with t4_l2t_free */
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e->state = L2T_STATE_SWITCHING;
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atomic_store_rel_int(&e->refcnt, 1);
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mtx_unlock(&e->lock);
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}
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rw_wunlock(&d->lock);
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return e;
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}
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/*
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* Sets/updates the contents of a switching L2T entry that has been allocated
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* with an earlier call to @t4_l2t_alloc_switching.
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*/
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int
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t4_l2t_set_switching(struct adapter *sc, struct l2t_entry *e, uint16_t vlan,
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uint8_t port, uint8_t *eth_addr)
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{
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int rc;
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e->vlan = vlan;
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e->lport = port;
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e->wrq = &sc->sge.mgmtq;
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e->iqid = sc->sge.fwq.abs_id;
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memcpy(e->dmac, eth_addr, ETHER_ADDR_LEN);
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mtx_lock(&e->lock);
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rc = t4_write_l2e(e, 0);
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mtx_unlock(&e->lock);
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return (rc);
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}
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int
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t4_init_l2t(struct adapter *sc, int flags)
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{
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int i, l2t_size;
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struct l2t_data *d;
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l2t_size = sc->vres.l2t.size;
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if (l2t_size < 2) /* At least 1 bucket for IP and 1 for IPv6 */
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return (EINVAL);
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d = malloc(sizeof(*d) + l2t_size * sizeof (struct l2t_entry), M_CXGBE,
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M_ZERO | flags);
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if (!d)
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return (ENOMEM);
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d->l2t_size = l2t_size;
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d->rover = d->l2tab;
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atomic_store_rel_int(&d->nfree, l2t_size);
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rw_init(&d->lock, "L2T");
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for (i = 0; i < l2t_size; i++) {
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struct l2t_entry *e = &d->l2tab[i];
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e->idx = i;
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e->state = L2T_STATE_UNUSED;
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mtx_init(&e->lock, "L2T_E", NULL, MTX_DEF);
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STAILQ_INIT(&e->wr_list);
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atomic_store_rel_int(&e->refcnt, 0);
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}
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sc->l2t = d;
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return (0);
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}
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int
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t4_free_l2t(struct l2t_data *d)
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{
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int i;
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for (i = 0; i < d->l2t_size; i++)
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mtx_destroy(&d->l2tab[i].lock);
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rw_destroy(&d->lock);
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free(d, M_CXGBE);
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return (0);
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}
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int
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do_l2t_write_rpl(struct sge_iq *iq, const struct rss_header *rss,
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struct mbuf *m)
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{
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const struct cpl_l2t_write_rpl *rpl = (const void *)(rss + 1);
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unsigned int tid = GET_TID(rpl);
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unsigned int idx = tid % L2T_SIZE;
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if (__predict_false(rpl->status != CPL_ERR_NONE)) {
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log(LOG_ERR,
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"Unexpected L2T_WRITE_RPL (%u) for entry at hw_idx %u\n",
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rpl->status, idx);
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return (EINVAL);
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}
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return (0);
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}
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#ifdef SBUF_DRAIN
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static inline unsigned int
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vlan_prio(const struct l2t_entry *e)
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{
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return e->vlan >> 13;
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}
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static char
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l2e_state(const struct l2t_entry *e)
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{
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switch (e->state) {
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case L2T_STATE_VALID: return 'V'; /* valid, fast-path entry */
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case L2T_STATE_STALE: return 'S'; /* needs revalidation, but usable */
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case L2T_STATE_SYNC_WRITE: return 'W';
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case L2T_STATE_RESOLVING: return STAILQ_EMPTY(&e->wr_list) ? 'R' : 'A';
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case L2T_STATE_SWITCHING: return 'X';
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default: return 'U';
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}
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}
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int
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sysctl_l2t(SYSCTL_HANDLER_ARGS)
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{
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struct adapter *sc = arg1;
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struct l2t_data *l2t = sc->l2t;
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struct l2t_entry *e;
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struct sbuf *sb;
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int rc, i, header = 0;
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char ip[INET6_ADDRSTRLEN];
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if (l2t == NULL)
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return (ENXIO);
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rc = sysctl_wire_old_buffer(req, 0);
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if (rc != 0)
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return (rc);
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sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req);
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if (sb == NULL)
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return (ENOMEM);
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e = &l2t->l2tab[0];
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for (i = 0; i < l2t->l2t_size; i++, e++) {
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mtx_lock(&e->lock);
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if (e->state == L2T_STATE_UNUSED)
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goto skip;
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if (header == 0) {
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sbuf_printf(sb, " Idx IP address "
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"Ethernet address VLAN/P LP State Users Port");
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header = 1;
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}
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if (e->state == L2T_STATE_SWITCHING)
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ip[0] = 0;
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else {
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inet_ntop(e->ipv6 ? AF_INET6 : AF_INET, &e->addr[0],
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&ip[0], sizeof(ip));
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}
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/*
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* XXX: IPv6 addresses may not align properly in the output.
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*/
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sbuf_printf(sb, "\n%4u %-15s %02x:%02x:%02x:%02x:%02x:%02x %4d"
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" %u %2u %c %5u %s",
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e->idx, ip, e->dmac[0], e->dmac[1], e->dmac[2],
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e->dmac[3], e->dmac[4], e->dmac[5],
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e->vlan & 0xfff, vlan_prio(e), e->lport,
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l2e_state(e), atomic_load_acq_int(&e->refcnt),
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e->ifp ? e->ifp->if_xname : "-");
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skip:
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mtx_unlock(&e->lock);
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}
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rc = sbuf_finish(sb);
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sbuf_delete(sb);
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return (rc);
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}
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#endif
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