5fe82bca57
- First off, device drivers really do need to know if they are allocating
MSI or MSI-X messages. MSI requires allocating powerof2() messages for
example where MSI-X does not. To address this, split out the MSI-X
support from pci_msi_count() and pci_alloc_msi() into new driver-visible
functions pci_msix_count() and pci_alloc_msix(). As a result,
pci_msi_count() now just returns a count of the max supported MSI
messages for the device, and pci_alloc_msi() only tries to allocate MSI
messages. To get a count of the max supported MSI-X messages, use
pci_msix_count(). To allocate MSI-X messages, use pci_alloc_msix().
pci_release_msi() still handles both MSI and MSI-X messages, however.
As a result of this change, drivers using the existing API will only
use MSI messages and will no longer try to use MSI-X messages.
- Because MSI-X allows for each message to have its own data and address
values (and thus does not require all of the messages to have their
MD vectors allocated as a group), some devices allow for "sparse" use
of MSI-X message slots. For example, if a device supports 8 messages
but the OS is only able to allocate 2 messages, the device may make the
best use of 2 IRQs if it enables the messages at slots 1 and 4 rather
than default of using the first N slots (or indicies) at 1 and 2. To
support this, add a new pci_remap_msix() function that a driver may call
after a successful pci_alloc_msix() (but before allocating any of the
SYS_RES_IRQ resources) to allow the allocated IRQ resources to be
assigned to different message indices. For example, from the earlier
example, after pci_alloc_msix() returned a value of 2, the driver would
call pci_remap_msix() passing in array of integers { 1, 4 } as the
new message indices to use. The rid's for the SYS_RES_IRQ resources
will always match the message indices. Thus, after the call to
pci_remap_msix() the driver would be able to access the first message
in slot 1 at SYS_RES_IRQ rid 1, and the second message at slot 4 at
SYS_RES_IRQ rid 4. Note that the message slots/indices are 1-based
rather than 0-based so that they will always correspond to the rid
values (SYS_RES_IRQ rid 0 is reserved for the legacy INTx interrupt).
To support this API, a new PCIB_REMAP_MSIX() method was added to the
pcib interface to change the message index for a single IRQ.
Tested by: scottl
85 lines
3.8 KiB
C
85 lines
3.8 KiB
C
/*-
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* Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
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* Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __PCIB_PRIVATE_H__
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#define __PCIB_PRIVATE_H__
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/*
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* Export portions of generic PCI:PCI bridge support so that it can be
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* used by subclasses.
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*/
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/*
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* Bridge-specific data.
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*/
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struct pcib_softc
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{
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device_t dev;
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uint32_t flags; /* flags */
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#define PCIB_SUBTRACTIVE 0x1
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#define PCIB_DISABLE_MSI 0x2
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uint16_t command; /* command register */
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uint8_t secbus; /* secondary bus number */
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uint8_t subbus; /* subordinate bus number */
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pci_addr_t pmembase; /* base address of prefetchable memory */
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pci_addr_t pmemlimit; /* topmost address of prefetchable memory */
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pci_addr_t membase; /* base address of memory window */
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pci_addr_t memlimit; /* topmost address of memory window */
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uint32_t iobase; /* base address of port window */
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uint32_t iolimit; /* topmost address of port window */
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uint16_t secstat; /* secondary bus status register */
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uint16_t bridgectl; /* bridge control register */
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uint8_t seclat; /* secondary bus latency timer */
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};
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typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
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int host_pcib_get_busno(pci_read_config_fn read_config, int bus,
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int slot, int func, uint8_t *busnum);
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int pcib_attach(device_t dev);
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void pcib_attach_common(device_t dev);
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int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
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int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
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struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags);
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int pcib_maxslots(device_t dev);
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uint32_t pcib_read_config(device_t dev, int b, int s, int f, int reg, int width);
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void pcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width);
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int pcib_route_interrupt(device_t pcib, device_t dev, int pin);
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int pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs);
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int pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs);
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int pcib_alloc_msix(device_t pcib, device_t dev, int index, int *irq);
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int pcib_remap_msix(device_t pcib, device_t dev, int index, int irq);
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int pcib_release_msix(device_t pcib, device_t dev, int irq);
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#endif
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