606e071c41
OpenBSD and OpenSolaris do instead of fiddling with the MMUs ourselves. Unlike direct access the firmware methods don't automatically use the next free (?) TLB slot, instead the slot to be used has to be specified. We allocate the TLB slots for the kernel top-down as OpenSolaris suggests that the firmware will always allocate the ones for its own use bottom-up. Besides being simpler, according to OpenBSD using the firmware methods is required to allow booting on Sun Fire E10K with multi-systemboard domains.
955 lines
23 KiB
C
955 lines
23 KiB
C
/*-
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* Initial implementation:
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* Copyright (c) 2001 Robert Drehmel
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* All rights reserved.
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*
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* As long as the above copyright statement and this notice remain
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* unchanged, you can do what ever you want with this file.
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*/
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/*-
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* Copyright (c) 2008 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* FreeBSD/sparc64 kernel loader - machine dependent part
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*
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* - implements copyin and readin functions that map kernel
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* pages on demand. The machine independent code does not
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* know the size of the kernel early enough to pre-enter
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* TTEs and install just one 4MB mapping seemed to limiting
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* to me.
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*/
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#include <stand.h>
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#include <sys/param.h>
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#include <sys/exec.h>
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#include <sys/linker.h>
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <vm/vm.h>
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#include <machine/asi.h>
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#include <machine/cmt.h>
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#include <machine/cpufunc.h>
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#include <machine/elf.h>
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#include <machine/fireplane.h>
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#include <machine/jbus.h>
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#include <machine/lsu.h>
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#include <machine/metadata.h>
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#include <machine/tte.h>
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#include <machine/tlb.h>
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#include <machine/upa.h>
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#include <machine/ver.h>
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#include <machine/vmparam.h>
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#include "bootstrap.h"
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#include "libofw.h"
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#include "dev_net.h"
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#ifndef CTASSERT
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#define CTASSERT(x) _CTASSERT(x, __LINE__)
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#define _CTASSERT(x, y) __CTASSERT(x, y)
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#define __CTASSERT(x, y) typedef char __assert ## y[(x) ? 1 : -1]
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#endif
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extern char bootprog_name[], bootprog_rev[], bootprog_date[], bootprog_maker[];
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enum {
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HEAPVA = 0x800000,
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HEAPSZ = 0x1000000,
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LOADSZ = 0x1000000 /* for kernel and modules */
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};
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/* At least Sun Fire V1280 require page sized allocations to be claimed. */
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CTASSERT(HEAPSZ % PAGE_SIZE == 0);
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static struct mmu_ops {
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void (*tlb_init)(void);
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int (*mmu_mapin)(vm_offset_t va, vm_size_t len);
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} *mmu_ops;
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typedef void kernel_entry_t(vm_offset_t mdp, u_long o1, u_long o2, u_long o3,
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void *openfirmware);
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static inline u_long dtlb_get_data_sun4u(u_int);
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static int dtlb_enter_sun4u(u_int, u_long data, vm_offset_t);
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static vm_offset_t dtlb_va_to_pa_sun4u(vm_offset_t);
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static inline u_long itlb_get_data_sun4u(u_int);
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static int itlb_enter_sun4u(u_int, u_long data, vm_offset_t);
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static vm_offset_t itlb_va_to_pa_sun4u(vm_offset_t);
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static void itlb_relocate_locked0_sun4u(void);
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extern vm_offset_t md_load(char *, vm_offset_t *);
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static int sparc64_autoload(void);
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static ssize_t sparc64_readin(const int, vm_offset_t, const size_t);
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static ssize_t sparc64_copyin(const void *, vm_offset_t, size_t);
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static void sparc64_maphint(vm_offset_t, size_t);
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static vm_offset_t claim_virt(vm_offset_t, size_t, int);
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static vm_offset_t alloc_phys(size_t, int);
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static int map_phys(int, size_t, vm_offset_t, vm_offset_t);
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static void release_phys(vm_offset_t, u_int);
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static int __elfN(exec)(struct preloaded_file *);
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static int mmu_mapin_sun4u(vm_offset_t, vm_size_t);
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static int mmu_mapin_sun4v(vm_offset_t, vm_size_t);
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static vm_offset_t init_heap(void);
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static phandle_t find_bsp_sun4u(phandle_t, uint32_t);
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const char *cpu_cpuid_prop_sun4u(void);
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uint32_t cpu_get_mid_sun4u(void);
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static void tlb_init_sun4u(void);
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static void tlb_init_sun4v(void);
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#ifdef LOADER_DEBUG
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typedef u_int64_t tte_t;
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static void pmap_print_tlb_sun4u(void);
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static void pmap_print_tte_sun4u(tte_t, tte_t);
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#endif
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static struct mmu_ops mmu_ops_sun4u = { tlb_init_sun4u, mmu_mapin_sun4u };
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static struct mmu_ops mmu_ops_sun4v = { tlb_init_sun4v, mmu_mapin_sun4v };
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/* sun4u */
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struct tlb_entry *dtlb_store;
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struct tlb_entry *itlb_store;
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u_int dtlb_slot;
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u_int itlb_slot;
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int cpu_impl;
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static u_int dtlb_slot_max;
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static u_int itlb_slot_max;
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/* sun4v */
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static struct tlb_entry *tlb_store;
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static int is_sun4v = 0;
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/*
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* no direct TLB access on sun4v
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* we somewhat arbitrarily declare enough
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* slots to cover a 4GB AS with 4MB pages
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*/
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#define SUN4V_TLB_SLOT_MAX (1 << 10)
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static vm_offset_t curkva = 0;
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static vm_offset_t heapva;
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static phandle_t root;
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/*
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* Machine dependent structures that the machine independent
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* loader part uses.
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*/
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struct devsw *devsw[] = {
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#ifdef LOADER_DISK_SUPPORT
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&ofwdisk,
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#endif
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#ifdef LOADER_NET_SUPPORT
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&netdev,
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#endif
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0
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};
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struct arch_switch archsw;
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static struct file_format sparc64_elf = {
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__elfN(loadfile),
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__elfN(exec)
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};
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struct file_format *file_formats[] = {
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&sparc64_elf,
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0
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};
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struct fs_ops *file_system[] = {
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#ifdef LOADER_UFS_SUPPORT
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&ufs_fsops,
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#endif
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#ifdef LOADER_CD9660_SUPPORT
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&cd9660_fsops,
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#endif
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#ifdef LOADER_ZIP_SUPPORT
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&zipfs_fsops,
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#endif
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#ifdef LOADER_GZIP_SUPPORT
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&gzipfs_fsops,
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#endif
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#ifdef LOADER_BZIP2_SUPPORT
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&bzipfs_fsops,
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#endif
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#ifdef LOADER_NFS_SUPPORT
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&nfs_fsops,
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#endif
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#ifdef LOADER_TFTP_SUPPORT
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&tftp_fsops,
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#endif
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0
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};
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struct netif_driver *netif_drivers[] = {
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#ifdef LOADER_NET_SUPPORT
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&ofwnet,
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#endif
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0
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};
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extern struct console ofwconsole;
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struct console *consoles[] = {
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&ofwconsole,
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0
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};
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#ifdef LOADER_DEBUG
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static int
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watch_phys_set_mask(vm_offset_t pa, u_long mask)
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{
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u_long lsucr;
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stxa(AA_DMMU_PWPR, ASI_DMMU, pa & (((2UL << 38) - 1) << 3));
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lsucr = ldxa(0, ASI_LSU_CTL_REG);
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lsucr = ((lsucr | LSU_PW) & ~LSU_PM_MASK) |
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(mask << LSU_PM_SHIFT);
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stxa(0, ASI_LSU_CTL_REG, lsucr);
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return (0);
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}
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static int
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watch_phys_set(vm_offset_t pa, int sz)
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{
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u_long off;
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off = (u_long)pa & 7;
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/* Test for misaligned watch points. */
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if (off + sz > 8)
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return (-1);
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return (watch_phys_set_mask(pa, ((1 << sz) - 1) << off));
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}
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static int
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watch_virt_set_mask(vm_offset_t va, u_long mask)
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{
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u_long lsucr;
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stxa(AA_DMMU_VWPR, ASI_DMMU, va & (((2UL << 41) - 1) << 3));
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lsucr = ldxa(0, ASI_LSU_CTL_REG);
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lsucr = ((lsucr | LSU_VW) & ~LSU_VM_MASK) |
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(mask << LSU_VM_SHIFT);
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stxa(0, ASI_LSU_CTL_REG, lsucr);
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return (0);
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}
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static int
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watch_virt_set(vm_offset_t va, int sz)
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{
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u_long off;
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off = (u_long)va & 7;
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/* Test for misaligned watch points. */
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if (off + sz > 8)
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return (-1);
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return (watch_virt_set_mask(va, ((1 << sz) - 1) << off));
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}
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#endif
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/*
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* archsw functions
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*/
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static int
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sparc64_autoload(void)
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{
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return (0);
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}
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static ssize_t
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sparc64_readin(const int fd, vm_offset_t va, const size_t len)
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{
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mmu_ops->mmu_mapin(va, len);
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return (read(fd, (void *)va, len));
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}
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static ssize_t
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sparc64_copyin(const void *src, vm_offset_t dest, size_t len)
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{
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mmu_ops->mmu_mapin(dest, len);
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memcpy((void *)dest, src, len);
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return (len);
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}
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static void
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sparc64_maphint(vm_offset_t va, size_t len)
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{
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vm_paddr_t pa;
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vm_offset_t mva;
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size_t size;
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int i, free_excess = 0;
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if (!is_sun4v)
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return;
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if (tlb_store[va >> 22].te_pa != -1)
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return;
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/* round up to nearest 4MB page */
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size = (len + PAGE_MASK_4M) & ~PAGE_MASK_4M;
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#if 0
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pa = alloc_phys(PAGE_SIZE_256M, PAGE_SIZE_256M);
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if (pa != -1)
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free_excess = 1;
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else
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#endif
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pa = alloc_phys(size, PAGE_SIZE_256M);
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if (pa == -1)
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pa = alloc_phys(size, PAGE_SIZE_4M);
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if (pa == -1)
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panic("%s: out of memory", __func__);
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for (i = 0; i < size; i += PAGE_SIZE_4M) {
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mva = claim_virt(va + i, PAGE_SIZE_4M, 0);
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if (mva != (va + i))
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panic("%s: can't claim virtual page "
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"(wanted %#lx, got %#lx)",
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__func__, va, mva);
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tlb_store[mva >> 22].te_pa = pa + i;
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if (map_phys(-1, PAGE_SIZE_4M, mva, pa + i) != 0)
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printf("%s: can't map physical page\n", __func__);
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}
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if (free_excess)
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release_phys(pa, PAGE_SIZE_256M);
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}
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/*
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* other MD functions
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*/
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static vm_offset_t
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claim_virt(vm_offset_t virt, size_t size, int align)
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{
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vm_offset_t mva;
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if (OF_call_method("claim", mmu, 3, 1, virt, size, align, &mva) == -1)
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return ((vm_offset_t)-1);
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return (mva);
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}
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static vm_offset_t
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alloc_phys(size_t size, int align)
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{
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cell_t phys_hi, phys_low;
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if (OF_call_method("claim", memory, 2, 2, size, align, &phys_low,
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&phys_hi) == -1)
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return ((vm_offset_t)-1);
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return ((vm_offset_t)phys_hi << 32 | phys_low);
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}
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static int
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map_phys(int mode, size_t size, vm_offset_t virt, vm_offset_t phys)
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{
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return (OF_call_method("map", mmu, 5, 0, (uint32_t)phys,
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(uint32_t)(phys >> 32), virt, size, mode));
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}
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static void
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release_phys(vm_offset_t phys, u_int size)
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{
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(void)OF_call_method("release", memory, 3, 0, (uint32_t)phys,
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(uint32_t)(phys >> 32), size);
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}
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static int
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__elfN(exec)(struct preloaded_file *fp)
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{
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struct file_metadata *fmp;
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vm_offset_t mdp;
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Elf_Addr entry;
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Elf_Ehdr *e;
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int error;
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if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == 0)
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return (EFTYPE);
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e = (Elf_Ehdr *)&fmp->md_data;
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if ((error = md_load(fp->f_args, &mdp)) != 0)
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return (error);
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printf("jumping to kernel entry at %#lx.\n", e->e_entry);
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#ifdef LOADER_DEBUG
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pmap_print_tlb_sun4u();
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#endif
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dev_cleanup();
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entry = e->e_entry;
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OF_release((void *)heapva, HEAPSZ);
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((kernel_entry_t *)entry)(mdp, 0, 0, 0, openfirmware);
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panic("%s: exec returned", __func__);
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}
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static inline u_long
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dtlb_get_data_sun4u(u_int slot)
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{
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/*
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* We read ASI_DTLB_DATA_ACCESS_REG twice in order to work
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* around errata of USIII and beyond.
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*/
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(void)ldxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG);
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return (ldxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG));
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}
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static inline u_long
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itlb_get_data_sun4u(u_int slot)
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{
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/*
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* We read ASI_ITLB_DATA_ACCESS_REG twice in order to work
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* around errata of USIII and beyond.
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*/
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(void)ldxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG);
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return (ldxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG));
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}
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static vm_offset_t
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dtlb_va_to_pa_sun4u(vm_offset_t va)
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{
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u_long pstate, reg;
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int i;
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pstate = rdpr(pstate);
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wrpr(pstate, pstate & ~PSTATE_IE, 0);
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for (i = 0; i < dtlb_slot_max; i++) {
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reg = ldxa(TLB_DAR_SLOT(i), ASI_DTLB_TAG_READ_REG);
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if (TLB_TAR_VA(reg) != va)
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continue;
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reg = dtlb_get_data_sun4u(i);
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wrpr(pstate, pstate, 0);
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reg >>= TD_PA_SHIFT;
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if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
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return (reg & TD_PA_CH_MASK);
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return (reg & TD_PA_SF_MASK);
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}
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wrpr(pstate, pstate, 0);
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return (-1);
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}
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static vm_offset_t
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itlb_va_to_pa_sun4u(vm_offset_t va)
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{
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u_long pstate, reg;
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int i;
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pstate = rdpr(pstate);
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wrpr(pstate, pstate & ~PSTATE_IE, 0);
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for (i = 0; i < itlb_slot_max; i++) {
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reg = ldxa(TLB_DAR_SLOT(i), ASI_ITLB_TAG_READ_REG);
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if (TLB_TAR_VA(reg) != va)
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continue;
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reg = itlb_get_data_sun4u(i);
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wrpr(pstate, pstate, 0);
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reg >>= TD_PA_SHIFT;
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if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
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return (reg & TD_PA_CH_MASK);
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return (reg & TD_PA_SF_MASK);
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}
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wrpr(pstate, pstate, 0);
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return (-1);
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}
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static int
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dtlb_enter_sun4u(u_int index, u_long data, vm_offset_t virt)
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{
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return (OF_call_method("SUNW,dtlb-load", mmu, 3, 0, index, data,
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virt));
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}
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static int
|
|
itlb_enter_sun4u(u_int index, u_long data, vm_offset_t virt)
|
|
{
|
|
|
|
if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp && index == 0 &&
|
|
(data & TD_L) != 0)
|
|
panic("%s: won't enter locked TLB entry at index 0 on USIII+",
|
|
__func__);
|
|
return (OF_call_method("SUNW,itlb-load", mmu, 3, 0, index, data,
|
|
virt));
|
|
}
|
|
|
|
static void
|
|
itlb_relocate_locked0_sun4u(void)
|
|
{
|
|
u_long data, pstate, tag;
|
|
int i;
|
|
|
|
if (cpu_impl != CPU_IMPL_ULTRASPARCIIIp)
|
|
return;
|
|
|
|
pstate = rdpr(pstate);
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
|
|
|
data = itlb_get_data_sun4u(0);
|
|
if ((data & (TD_V | TD_L)) != (TD_V | TD_L)) {
|
|
wrpr(pstate, pstate, 0);
|
|
return;
|
|
}
|
|
|
|
/* Flush the mapping of slot 0. */
|
|
tag = ldxa(TLB_DAR_SLOT(0), ASI_ITLB_TAG_READ_REG);
|
|
stxa(TLB_DEMAP_VA(TLB_TAR_VA(tag)) | TLB_DEMAP_PRIMARY |
|
|
TLB_DEMAP_PAGE, ASI_IMMU_DEMAP, 0);
|
|
flush(0); /* The USIII-family ignores the address. */
|
|
|
|
/*
|
|
* Search a replacement slot != 0 and enter the data and tag
|
|
* that formerly were in slot 0.
|
|
*/
|
|
for (i = 1; i < itlb_slot_max; i++) {
|
|
if ((itlb_get_data_sun4u(i) & TD_V) != 0)
|
|
continue;
|
|
|
|
stxa(AA_IMMU_TAR, ASI_IMMU, tag);
|
|
stxa(TLB_DAR_SLOT(i), ASI_ITLB_DATA_ACCESS_REG, data);
|
|
flush(0); /* The USIII-family ignores the address. */
|
|
break;
|
|
}
|
|
wrpr(pstate, pstate, 0);
|
|
if (i == itlb_slot_max)
|
|
panic("%s: could not find a replacement slot", __func__);
|
|
}
|
|
|
|
static int
|
|
mmu_mapin_sun4u(vm_offset_t va, vm_size_t len)
|
|
{
|
|
vm_offset_t pa, mva;
|
|
u_long data;
|
|
u_int index;
|
|
|
|
if (va + len > curkva)
|
|
curkva = va + len;
|
|
|
|
pa = (vm_offset_t)-1;
|
|
len += va & PAGE_MASK_4M;
|
|
va &= ~PAGE_MASK_4M;
|
|
while (len) {
|
|
if (dtlb_va_to_pa_sun4u(va) == (vm_offset_t)-1 ||
|
|
itlb_va_to_pa_sun4u(va) == (vm_offset_t)-1) {
|
|
/* Allocate a physical page, claim the virtual area. */
|
|
if (pa == (vm_offset_t)-1) {
|
|
pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
|
|
if (pa == (vm_offset_t)-1)
|
|
panic("%s: out of memory", __func__);
|
|
mva = claim_virt(va, PAGE_SIZE_4M, 0);
|
|
if (mva != va)
|
|
panic("%s: can't claim virtual page "
|
|
"(wanted %#lx, got %#lx)",
|
|
__func__, va, mva);
|
|
/*
|
|
* The mappings may have changed, be paranoid.
|
|
*/
|
|
continue;
|
|
}
|
|
/*
|
|
* Actually, we can only allocate two pages less at
|
|
* most (depending on the kernel TSB size).
|
|
*/
|
|
if (dtlb_slot >= dtlb_slot_max)
|
|
panic("%s: out of dtlb_slots", __func__);
|
|
if (itlb_slot >= itlb_slot_max)
|
|
panic("%s: out of itlb_slots", __func__);
|
|
data = TD_V | TD_4M | TD_PA(pa) | TD_L | TD_CP |
|
|
TD_CV | TD_P | TD_W;
|
|
dtlb_store[dtlb_slot].te_pa = pa;
|
|
dtlb_store[dtlb_slot].te_va = va;
|
|
index = dtlb_slot_max - dtlb_slot - 1;
|
|
if (dtlb_enter_sun4u(index, data, va) < 0)
|
|
panic("%s: can't enter dTLB slot %d data "
|
|
"%#lx va %#lx index %d", __func__, index,
|
|
data, va);
|
|
dtlb_slot++;
|
|
itlb_store[itlb_slot].te_pa = pa;
|
|
itlb_store[itlb_slot].te_va = va;
|
|
index = itlb_slot_max - itlb_slot - 1;
|
|
if (itlb_enter_sun4u(index, data, va) < 0)
|
|
panic("%s: can't enter iTLB slot %d data "
|
|
"%#lx va %#lx index %d", __func__, index,
|
|
data, va);
|
|
itlb_slot++;
|
|
pa = (vm_offset_t)-1;
|
|
}
|
|
len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
|
|
va += PAGE_SIZE_4M;
|
|
}
|
|
if (pa != (vm_offset_t)-1)
|
|
release_phys(pa, PAGE_SIZE_4M);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
mmu_mapin_sun4v(vm_offset_t va, vm_size_t len)
|
|
{
|
|
vm_offset_t pa, mva;
|
|
|
|
if (va + len > curkva)
|
|
curkva = va + len;
|
|
|
|
pa = (vm_offset_t)-1;
|
|
len += va & PAGE_MASK_4M;
|
|
va &= ~PAGE_MASK_4M;
|
|
while (len) {
|
|
if ((va >> 22) > SUN4V_TLB_SLOT_MAX)
|
|
panic("%s: trying to map more than 4GB", __func__);
|
|
if (tlb_store[va >> 22].te_pa == -1) {
|
|
/* Allocate a physical page, claim the virtual area */
|
|
if (pa == (vm_offset_t)-1) {
|
|
pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
|
|
if (pa == (vm_offset_t)-1)
|
|
panic("%s: out of memory", __func__);
|
|
mva = claim_virt(va, PAGE_SIZE_4M, 0);
|
|
if (mva != va)
|
|
panic("%s: can't claim virtual page "
|
|
"(wanted %#lx, got %#lx)",
|
|
__func__, va, mva);
|
|
}
|
|
|
|
tlb_store[va >> 22].te_pa = pa;
|
|
if (map_phys(-1, PAGE_SIZE_4M, va, pa) == -1)
|
|
printf("%s: can't map physical page\n",
|
|
__func__);
|
|
pa = (vm_offset_t)-1;
|
|
}
|
|
len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
|
|
va += PAGE_SIZE_4M;
|
|
}
|
|
if (pa != (vm_offset_t)-1)
|
|
release_phys(pa, PAGE_SIZE_4M);
|
|
return (0);
|
|
}
|
|
|
|
static vm_offset_t
|
|
init_heap(void)
|
|
{
|
|
|
|
/* There is no need for continuous physical heap memory. */
|
|
heapva = (vm_offset_t)OF_claim((void *)HEAPVA, HEAPSZ, 32);
|
|
return (heapva);
|
|
}
|
|
|
|
static phandle_t
|
|
find_bsp_sun4u(phandle_t node, uint32_t bspid)
|
|
{
|
|
char type[sizeof("cpu")];
|
|
phandle_t child;
|
|
uint32_t cpuid;
|
|
|
|
for (; node > 0; node = OF_peer(node)) {
|
|
child = OF_child(node);
|
|
if (child > 0) {
|
|
child = find_bsp_sun4u(child, bspid);
|
|
if (child > 0)
|
|
return (child);
|
|
} else {
|
|
if (OF_getprop(node, "device_type", type,
|
|
sizeof(type)) <= 0)
|
|
continue;
|
|
if (strcmp(type, "cpu") != 0)
|
|
continue;
|
|
if (OF_getprop(node, cpu_cpuid_prop_sun4u(), &cpuid,
|
|
sizeof(cpuid)) <= 0)
|
|
continue;
|
|
if (cpuid == bspid)
|
|
return (node);
|
|
}
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
const char *
|
|
cpu_cpuid_prop_sun4u(void)
|
|
{
|
|
|
|
switch (cpu_impl) {
|
|
case CPU_IMPL_SPARC64:
|
|
case CPU_IMPL_ULTRASPARCI:
|
|
case CPU_IMPL_ULTRASPARCII:
|
|
case CPU_IMPL_ULTRASPARCIIi:
|
|
case CPU_IMPL_ULTRASPARCIIe:
|
|
return ("upa-portid");
|
|
case CPU_IMPL_ULTRASPARCIII:
|
|
case CPU_IMPL_ULTRASPARCIIIp:
|
|
case CPU_IMPL_ULTRASPARCIIIi:
|
|
case CPU_IMPL_ULTRASPARCIIIip:
|
|
return ("portid");
|
|
case CPU_IMPL_ULTRASPARCIV:
|
|
case CPU_IMPL_ULTRASPARCIVp:
|
|
return ("cpuid");
|
|
default:
|
|
return ("");
|
|
}
|
|
}
|
|
|
|
uint32_t
|
|
cpu_get_mid_sun4u(void)
|
|
{
|
|
|
|
switch (cpu_impl) {
|
|
case CPU_IMPL_SPARC64:
|
|
case CPU_IMPL_ULTRASPARCI:
|
|
case CPU_IMPL_ULTRASPARCII:
|
|
case CPU_IMPL_ULTRASPARCIIi:
|
|
case CPU_IMPL_ULTRASPARCIIe:
|
|
return (UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG)));
|
|
case CPU_IMPL_ULTRASPARCIII:
|
|
case CPU_IMPL_ULTRASPARCIIIp:
|
|
return (FIREPLANE_CR_GET_AID(ldxa(AA_FIREPLANE_CONFIG,
|
|
ASI_FIREPLANE_CONFIG_REG)));
|
|
case CPU_IMPL_ULTRASPARCIIIi:
|
|
case CPU_IMPL_ULTRASPARCIIIip:
|
|
return (JBUS_CR_GET_JID(ldxa(0, ASI_JBUS_CONFIG_REG)));
|
|
case CPU_IMPL_ULTRASPARCIV:
|
|
case CPU_IMPL_ULTRASPARCIVp:
|
|
return (INTR_ID_GET_ID(ldxa(AA_INTR_ID, ASI_INTR_ID)));
|
|
default:
|
|
return (0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
tlb_init_sun4u(void)
|
|
{
|
|
phandle_t bsp;
|
|
|
|
cpu_impl = VER_IMPL(rdpr(ver));
|
|
bsp = find_bsp_sun4u(OF_child(root), cpu_get_mid_sun4u());
|
|
if (bsp == 0)
|
|
panic("%s: no node for bootcpu?!?!", __func__);
|
|
|
|
if (OF_getprop(bsp, "#dtlb-entries", &dtlb_slot_max,
|
|
sizeof(dtlb_slot_max)) == -1 ||
|
|
OF_getprop(bsp, "#itlb-entries", &itlb_slot_max,
|
|
sizeof(itlb_slot_max)) == -1)
|
|
panic("%s: can't get TLB slot max.", __func__);
|
|
|
|
if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) {
|
|
#ifdef LOADER_DEBUG
|
|
printf("pre fixup:\n");
|
|
pmap_print_tlb_sun4u();
|
|
#endif
|
|
|
|
/*
|
|
* Relocate the locked entry in it16 slot 0 (if existent)
|
|
* as part of working around Cheetah+ erratum 34.
|
|
*/
|
|
itlb_relocate_locked0_sun4u();
|
|
|
|
#ifdef LOADER_DEBUG
|
|
printf("post fixup:\n");
|
|
pmap_print_tlb_sun4u();
|
|
#endif
|
|
}
|
|
|
|
dtlb_store = malloc(dtlb_slot_max * sizeof(*dtlb_store));
|
|
itlb_store = malloc(itlb_slot_max * sizeof(*itlb_store));
|
|
if (dtlb_store == NULL || itlb_store == NULL)
|
|
panic("%s: can't allocate TLB store", __func__);
|
|
}
|
|
|
|
static void
|
|
tlb_init_sun4v(void)
|
|
{
|
|
|
|
tlb_store = malloc(SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
|
|
memset(tlb_store, 0xFF, SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
|
|
}
|
|
|
|
int
|
|
main(int (*openfirm)(void *))
|
|
{
|
|
char bootpath[64];
|
|
char compatible[32];
|
|
struct devsw **dp;
|
|
|
|
/*
|
|
* Tell the Open Firmware functions where they find the OFW gate.
|
|
*/
|
|
OF_init(openfirm);
|
|
|
|
archsw.arch_getdev = ofw_getdev;
|
|
archsw.arch_copyin = sparc64_copyin;
|
|
archsw.arch_copyout = ofw_copyout;
|
|
archsw.arch_readin = sparc64_readin;
|
|
archsw.arch_autoload = sparc64_autoload;
|
|
archsw.arch_maphint = sparc64_maphint;
|
|
|
|
/*
|
|
* Probe for a console.
|
|
*/
|
|
cons_probe();
|
|
|
|
if (init_heap() == (vm_offset_t)-1)
|
|
panic("%s: can't claim heap", __func__);
|
|
setheap((void *)heapva, (void *)(heapva + HEAPSZ));
|
|
|
|
if ((root = OF_peer(0)) == -1)
|
|
panic("%s: can't get root phandle", __func__);
|
|
OF_getprop(root, "compatible", compatible, sizeof(compatible));
|
|
if (!strcmp(compatible, "sun4v")) {
|
|
printf("\nBooting with sun4v support.\n");
|
|
mmu_ops = &mmu_ops_sun4v;
|
|
is_sun4v = 1;
|
|
} else {
|
|
printf("\nBooting with sun4u support.\n");
|
|
mmu_ops = &mmu_ops_sun4u;
|
|
}
|
|
|
|
mmu_ops->tlb_init();
|
|
|
|
/*
|
|
* Initialize devices.
|
|
*/
|
|
for (dp = devsw; *dp != 0; dp++) {
|
|
if ((*dp)->dv_init != 0)
|
|
(*dp)->dv_init();
|
|
}
|
|
|
|
/*
|
|
* Set up the current device.
|
|
*/
|
|
OF_getprop(chosen, "bootpath", bootpath, sizeof(bootpath));
|
|
|
|
/*
|
|
* Sun compatible bootable CD-ROMs have a disk label placed
|
|
* before the cd9660 data, with the actual filesystem being
|
|
* in the first partition, while the other partitions contain
|
|
* pseudo disk labels with embedded boot blocks for different
|
|
* architectures, which may be followed by UFS filesystems.
|
|
* The firmware will set the boot path to the partition it
|
|
* boots from ('f' in the sun4u case), but we want the kernel
|
|
* to be loaded from the cd9660 fs ('a'), so the boot path
|
|
* needs to be altered.
|
|
*/
|
|
if (bootpath[strlen(bootpath) - 2] == ':' &&
|
|
bootpath[strlen(bootpath) - 1] == 'f') {
|
|
bootpath[strlen(bootpath) - 1] = 'a';
|
|
printf("Boot path set to %s\n", bootpath);
|
|
}
|
|
|
|
env_setenv("currdev", EV_VOLATILE, bootpath,
|
|
ofw_setcurrdev, env_nounset);
|
|
env_setenv("loaddev", EV_VOLATILE, bootpath,
|
|
env_noset, env_nounset);
|
|
|
|
printf("\n");
|
|
printf("%s, Revision %s\n", bootprog_name, bootprog_rev);
|
|
printf("(%s, %s)\n", bootprog_maker, bootprog_date);
|
|
printf("bootpath=\"%s\"\n", bootpath);
|
|
|
|
/* Give control to the machine independent loader code. */
|
|
interact();
|
|
return (1);
|
|
}
|
|
|
|
COMMAND_SET(reboot, "reboot", "reboot the system", command_reboot);
|
|
|
|
static int
|
|
command_reboot(int argc, char *argv[])
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; devsw[i] != NULL; ++i)
|
|
if (devsw[i]->dv_cleanup != NULL)
|
|
(devsw[i]->dv_cleanup)();
|
|
|
|
printf("Rebooting...\n");
|
|
OF_exit();
|
|
}
|
|
|
|
/* provide this for panic, as it's not in the startup code */
|
|
void
|
|
exit(int code)
|
|
{
|
|
|
|
OF_exit();
|
|
}
|
|
|
|
#ifdef LOADER_DEBUG
|
|
static const char *const page_sizes[] = {
|
|
" 8k", " 64k", "512k", " 4m"
|
|
};
|
|
|
|
static void
|
|
pmap_print_tte_sun4u(tte_t tag, tte_t tte)
|
|
{
|
|
|
|
printf("%s %s ",
|
|
page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK],
|
|
tag & TD_G ? "G" : " ");
|
|
printf(tte & TD_W ? "W " : " ");
|
|
printf(tte & TD_P ? "\e[33mP\e[0m " : " ");
|
|
printf(tte & TD_E ? "E " : " ");
|
|
printf(tte & TD_CV ? "CV " : " ");
|
|
printf(tte & TD_CP ? "CP " : " ");
|
|
printf(tte & TD_L ? "\e[32mL\e[0m " : " ");
|
|
printf(tte & TD_IE ? "IE " : " ");
|
|
printf(tte & TD_NFO ? "NFO " : " ");
|
|
printf("pa=0x%lx va=0x%lx ctx=%ld\n",
|
|
TD_PA(tte), TLB_TAR_VA(tag), TLB_TAR_CTX(tag));
|
|
}
|
|
|
|
static void
|
|
pmap_print_tlb_sun4u(void)
|
|
{
|
|
tte_t tag, tte;
|
|
u_long pstate;
|
|
int i;
|
|
|
|
pstate = rdpr(pstate);
|
|
for (i = 0; i < itlb_slot_max; i++) {
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
|
tte = itlb_get_data_sun4u(i);
|
|
wrpr(pstate, pstate, 0);
|
|
if (!(tte & TD_V))
|
|
continue;
|
|
tag = ldxa(TLB_DAR_SLOT(i), ASI_ITLB_TAG_READ_REG);
|
|
printf("iTLB-%2u: ", i);
|
|
pmap_print_tte_sun4u(tag, tte);
|
|
}
|
|
for (i = 0; i < dtlb_slot_max; i++) {
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
|
tte = dtlb_get_data_sun4u(i);
|
|
wrpr(pstate, pstate, 0);
|
|
if (!(tte & TD_V))
|
|
continue;
|
|
tag = ldxa(TLB_DAR_SLOT(i), ASI_DTLB_TAG_READ_REG);
|
|
printf("dTLB-%2u: ", i);
|
|
pmap_print_tte_sun4u(tag, tte);
|
|
}
|
|
}
|
|
#endif
|