54a8c69347
Interrupts under the new scheme are managed by the i386 nexus with the awareness of the resource manager. There is further room for optimizing the interfaces still. All the users of register_intr()/intr_create() should be gone, with the exception of pcic and i386/isa/clock.c.
85 lines
2.7 KiB
C
85 lines
2.7 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: isavar.h,v 1.3 1999/04/16 21:22:34 peter Exp $
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*/
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#define ISA_NPORT_IVARS 2
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#define ISA_NMEM_IVARS 2
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#define ISA_NIRQ_IVARS 2
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#define ISA_NDRQ_IVARS 2
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enum isa_device_ivars {
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ISA_IVAR_PORT,
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ISA_IVAR_PORT_0 = ISA_IVAR_PORT,
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ISA_IVAR_PORT_1,
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ISA_IVAR_PORTSIZE,
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ISA_IVAR_PORTSIZE_0 = ISA_IVAR_PORTSIZE,
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ISA_IVAR_PORTSIZE_1,
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ISA_IVAR_MADDR,
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ISA_IVAR_MADDR_0 = ISA_IVAR_MADDR,
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ISA_IVAR_MADDR_1,
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ISA_IVAR_MSIZE,
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ISA_IVAR_MSIZE_0 = ISA_IVAR_MSIZE,
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ISA_IVAR_MSIZE_1,
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ISA_IVAR_FLAGS,
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ISA_IVAR_IRQ,
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ISA_IVAR_IRQ_0 = ISA_IVAR_IRQ,
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ISA_IVAR_IRQ_1,
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ISA_IVAR_DRQ,
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ISA_IVAR_DRQ_0 = ISA_IVAR_DRQ,
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ISA_IVAR_DRQ_1
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};
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extern intrmask_t isa_irq_pending(void);
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extern intrmask_t isa_irq_mask(void);
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/*
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* Simplified accessors for isa devices
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*/
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#define ISA_ACCESSOR(A, B, T) \
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\
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static __inline T isa_get_ ## A(device_t dev) \
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{ \
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uintptr_t v; \
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BUS_READ_IVAR(device_get_parent(dev), dev, ISA_IVAR_ ## B, &v); \
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return (T) v; \
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} \
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\
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static __inline void isa_set_ ## A(device_t dev, T t) \
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{ \
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u_long v = (u_long) t; \
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BUS_WRITE_IVAR(device_get_parent(dev), dev, ISA_IVAR_ ## B, v); \
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}
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ISA_ACCESSOR(port, PORT, int)
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ISA_ACCESSOR(portsize, PORTSIZE, int)
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ISA_ACCESSOR(flags, FLAGS, int)
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ISA_ACCESSOR(irq, IRQ, int)
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ISA_ACCESSOR(drq, DRQ, int)
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ISA_ACCESSOR(maddr, MADDR, int)
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ISA_ACCESSOR(msize, MSIZE, int)
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