511d4e58f3
The PLL_DDR clock have an update bit which need to be set after changing the value, add the possibility to define one for NKMP clocks. This allow us to add the missing clocks. We now have the full list of clocks created under the clock domain.
206 lines
6.0 KiB
C
206 lines
6.0 KiB
C
/*-
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* Copyright (c) 2017 Emmanuel Vadot <manu@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __CCU_H3_H__
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#define __CCU_H3_H__
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#define H3_RST_USB_PHY0 0
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#define H3_RST_USB_PHY1 1
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#define H3_RST_USB_PHY2 2
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#define H3_RST_USB_PHY3 3
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#define H3_RST_MBUS 4
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#define H3_RST_BUS_CE 5
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#define H3_RST_BUS_DMA 6
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#define H3_RST_BUS_MMC0 7
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#define H3_RST_BUS_MMC1 8
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#define H3_RST_BUS_MMC2 9
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#define H3_RST_BUS_NAND 10
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#define H3_RST_BUS_DRAM 11
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#define H3_RST_BUS_EMAC 12
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#define H3_RST_BUS_TS 13
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#define H3_RST_BUS_HSTIMER 14
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#define H3_RST_BUS_SPI0 15
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#define H3_RST_BUS_SPI1 16
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#define H3_RST_BUS_OTG 17
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#define H3_RST_BUS_EHCI0 18
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#define H3_RST_BUS_EHCI1 19
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#define H3_RST_BUS_EHCI2 20
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#define H3_RST_BUS_EHCI3 21
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#define H3_RST_BUS_OHCI0 22
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#define H3_RST_BUS_OHCI1 23
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#define H3_RST_BUS_OHCI2 24
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#define H3_RST_BUS_OHCI3 25
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#define H3_RST_BUS_VE 26
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#define H3_RST_BUS_TCON0 27
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#define H3_RST_BUS_TCON1 28
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#define H3_RST_BUS_DEINTERLACE 29
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#define H3_RST_BUS_CSI 30
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#define H3_RST_BUS_TVE 31
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#define H3_RST_BUS_HDMI0 32
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#define H3_RST_BUS_HDMI1 33
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#define H3_RST_BUS_DE 34
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#define H3_RST_BUS_GPU 35
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#define H3_RST_BUS_MSGBOX 36
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#define H3_RST_BUS_SPINLOCK 37
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#define H3_RST_BUS_DBG 38
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#define H3_RST_BUS_EPHY 39
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#define H3_RST_BUS_CODEC 40
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#define H3_RST_BUS_SPDIF 41
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#define H3_RST_BUS_THS 42
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#define H3_RST_BUS_I2S0 43
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#define H3_RST_BUS_I2S1 44
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#define H3_RST_BUS_I2S2 45
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#define H3_RST_BUS_I2C0 46
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#define H3_RST_BUS_I2C1 47
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#define H3_RST_BUS_I2C2 48
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#define H3_RST_BUS_UART0 49
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#define H3_RST_BUS_UART1 50
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#define H3_RST_BUS_UART2 51
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#define H3_RST_BUS_UART3 52
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#define H3_RST_BUS_SCR 53
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#define H3_CLK_PLL_CPUX 0
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#define H3_CLK_PLL_AUDIO_BASE 1
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#define H3_CLK_PLL_AUDIO 2
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#define H3_CLK_PLL_AUDIO_2X 3
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#define H3_CLK_PLL_AUDIO_4X 4
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#define H3_CLK_PLL_AUDIO_8X 5
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#define H3_CLK_PLL_VIDEO 6
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#define H3_CLK_PLL_VE 7
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#define H3_CLK_PLL_DDR 8
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#define H3_CLK_PLL_PERIPH0 9
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#define H3_CLK_PLL_PERIPH0_2X 10
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#define H3_CLK_PLL_GPU 11
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#define H3_CLK_PLL_PERIPH1 12
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#define H3_CLK_PLL_DE 13
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#define H3_CLK_CPUX 14
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#define H3_CLK_AXI 15
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#define H3_CLK_AHB1 16
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#define H3_CLK_APB1 17
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#define H3_CLK_APB2 18
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#define H3_CLK_AHB2 19
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#define H3_CLK_BUS_CE 20
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#define H3_CLK_BUS_DMA 21
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#define H3_CLK_BUS_MMC0 22
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#define H3_CLK_BUS_MMC1 23
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#define H3_CLK_BUS_MMC2 24
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#define H3_CLK_BUS_NAND 25
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#define H3_CLK_BUS_DRAM 26
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#define H3_CLK_BUS_EMAC 27
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#define H3_CLK_BUS_TS 28
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#define H3_CLK_BUS_HSTIMER 29
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#define H3_CLK_BUS_SPI0 30
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#define H3_CLK_BUS_SPI1 31
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#define H3_CLK_BUS_OTG 32
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#define H3_CLK_BUS_EHCI0 33
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#define H3_CLK_BUS_EHCI1 34
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#define H3_CLK_BUS_EHCI2 35
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#define H3_CLK_BUS_EHCI3 36
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#define H3_CLK_BUS_OHCI0 37
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#define H3_CLK_BUS_OHCI1 38
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#define H3_CLK_BUS_OHCI2 39
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#define H3_CLK_BUS_OHCI3 40
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#define H3_CLK_BUS_VE 41
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#define H3_CLK_BUS_TCON0 42
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#define H3_CLK_BUS_TCON1 43
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#define H3_CLK_BUS_DEINTERLACE 44
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#define H3_CLK_BUS_CSI 45
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#define H3_CLK_BUS_TVE 46
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#define H3_CLK_BUS_HDMI 47
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#define H3_CLK_BUS_DE 48
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#define H3_CLK_BUS_GPU 49
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#define H3_CLK_BUS_MSGBOX 50
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#define H3_CLK_BUS_SPINLOCK 51
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#define H3_CLK_BUS_CODEC 52
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#define H3_CLK_BUS_SPDIF 53
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#define H3_CLK_BUS_PIO 54
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#define H3_CLK_BUS_THS 55
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#define H3_CLK_BUS_I2S0 56
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#define H3_CLK_BUS_I2S1 57
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#define H3_CLK_BUS_I2S2 58
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#define H3_CLK_BUS_I2C0 59
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#define H3_CLK_BUS_I2C1 60
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#define H3_CLK_BUS_I2C2 61
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#define H3_CLK_BUS_UART0 62
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#define H3_CLK_BUS_UART1 63
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#define H3_CLK_BUS_UART2 64
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#define H3_CLK_BUS_UART3 65
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#define H3_CLK_BUS_SCR 66
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#define H3_CLK_BUS_EPHY 67
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#define H3_CLK_BUS_DBG 68
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#define H3_CLK_THS 69
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#define H3_CLK_NAND 70
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#define H3_CLK_MMC0 71
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#define H3_CLK_MMC0_SAMPLE 72
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#define H3_CLK_MMC0_OUTPUT 73
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#define H3_CLK_MMC1 74
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#define H3_CLK_MMC1_SAMPLE 75
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#define H3_CLK_MMC1_OUTPUT 76
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#define H3_CLK_MMC2 77
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#define H3_CLK_MMC2_SAMPLE 78
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#define H3_CLK_MMC2_OUTPUT 79
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#define H3_CLK_TS 80
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#define H3_CLK_CE 81
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#define H3_CLK_SPI0 82
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#define H3_CLK_SPI1 83
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#define H3_CLK_I2S0 84
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#define H3_CLK_I2S1 85
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#define H3_CLK_I2S2 86
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#define H3_CLK_SPDIF 87
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#define H3_CLK_USBPHY0 88
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#define H3_CLK_USBPHY1 89
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#define H3_CLK_USBPHY2 90
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#define H3_CLK_USBPHY3 91
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#define H3_CLK_USBOHCI0 92
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#define H3_CLK_USBOHCI1 93
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#define H3_CLK_USBOHCI2 94
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#define H3_CLK_USBOHCI3 95
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#define H3_CLK_DRAM 96
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#define H3_CLK_DRAM_VE 97
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#define H3_CLK_DRAM_CSI 98
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#define H3_CLK_DRAM_DEINTERLACE 99
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#define H3_CLK_DRAM_TS 100
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#define H3_CLK_DE 101
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#define H3_CLK_TCON0 102
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#define H3_CLK_TVE 103
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#define H3_CLK_DEINTERLACE 104
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#define H3_CLK_CSI_MISC 105
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#define H3_CLK_CSI_SCLK 106
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#define H3_CLK_CSI_MCLK 107
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#define H3_CLK_VE 108
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#define H3_CLK_AC_DIG 109
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#define H3_CLK_AVS 110
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#define H3_CLK_HDMI 111
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#define H3_CLK_HDMI_DDC 112
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#define H3_CLK_MBUS 113
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#define H3_CLK_GPU 114
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void ccu_h3_register_clocks(struct aw_ccung_softc *sc);
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#endif /* __CCU_H3_H__ */
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