Rafal Jaworowski 62a5c95054 Provide L2 cache synchronization (write back + invalidation) on ARM. ... Note the cpu_l2cache_wbinv_* routines are no-ops on systems not populated with L2 caches. Obtained from: Marvell, Semihalf		2008-10-13 18:59:59 +00:00
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arm	Provide L2 cache synchronization (write back + invalidation) on ARM.	2008-10-13 18:59:59 +00:00
at91	Use bus_get_dma_tag() instead of NULL here. Not really needed for atmel	2008-10-07 17:23:16 +00:00
compile
conf	Commit the no-brainer parts of my space saving kernel experiments. We	2008-09-08 00:41:32 +00:00
include	Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.	2008-10-13 18:16:54 +00:00
sa11x0	Now that all platforms use genclock, shuffle things around slightly	2008-04-22 19:38:30 +00:00
xscale	Allow static hints to override kenv.	2008-10-02 22:31:30 +00:00