Marius Strobl 646fd30caf - If present, take advantage of the R/W cache of eMMC revision 1.5 and ... later devices. These caches work akin to the ones found in HDDs/SSDs that ada(4)/da(4) also enable if existent, but likewise increase the likelihood of data loss in case of a sudden power outage etc. On the other hand, write performance is up to twice as high for e. g. 1 GiB files depending on the actual chip and transfer mode employed. For maximum data integrity, the usage of eMMC caches can be disabled via the hw.mmcsd.cache tunable. - Get rid of the NOP mmcsd_open().		2018-05-15 21:15:09 +00:00
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host	dwmmc_rockchip: Add ifdefs on EXT_RESOURCES	2018-02-28 19:05:25 +00:00
bridge.h
mmc_ioctl.h
mmc_private.h
mmc_subr.c
mmc_subr.h
mmc.c
mmcbr_if.m
mmcbrvar.h
mmcbus_if.m
mmcreg.h	- If present, take advantage of the R/W cache of eMMC revision 1.5 and	2018-05-15 21:15:09 +00:00
mmcsd.c	- If present, take advantage of the R/W cache of eMMC revision 1.5 and	2018-05-15 21:15:09 +00:00
mmcvar.h